Listing 2 Interrupt service routine
// ISRDemo.c
// Code adapted from \Platform\Cepc\Kernel\Hal
// Reformatted for clarity (i.e. lots of lines removed)
// OEMInit: Called for OEM initialization.
void OEMInit()
{
// Lots of initialization removed here.
// Setup the logical IDs for IRQ3, IRQ4 and IRQ5, in MapIntr2Sysintr[]
// based on SYSINTR_FIRMWARE + Irq (where SYSINTR_FIRMWARE = 16)
SETUP_INTERRUPT_MAP(SYSINTR_FIRMWARE+3, 3);
SETUP_INTERRUPT_MAP(SYSINTR_FIRMWARE+4, 4);
SETUP_INTERRUPT_MAP(SYSINTR_FIRMWARE+5, 5);
// Setup the PeRP interrupt handler and enable the PeRP interrupt in the
// BasePSR
// Note: on CEPC, IRQs vector to interrupts 0x40+ (i.e. IRQ3 -> 0x43)
for (i = 64; i < 80; i++)
HookInterrupt(i, (void *)ISR);
}
// ISR: The actual Interrupt Service Routine.
// On the CEPC, all IRQs are handled here.
ULONG ISR(void)
{
ULONG ulRet = SYSINTR_NOP;
UCHAR ucCurrentInterrupt;
// Get the current interrupt.
ucCurrentInterrupt = PICGetCurrentInterrupt();
// Get the related interrupt logical ID
// CEPC: SYSINTR_FIRMWARE + Irq (where SYSINTR_FIRMWARE = 16)
ulRet = MapIntr2Sysintr[ucCurrentInterrupt];
// Return the logical identifier
return ulRet;
}
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