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Use power-off protection for robust analog switch designs
Judicious use of power-off detection circuitry can make the analog switches in your embedded portable design more robust



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Analog switches are used in portable handheld devices such as cellphones and PDAs, and consumer devices such as computers and video displays. Regardless of the application, system designers often find cases of non-zero signals on the switch inputs when power is not supplied to the switch.

When subjected to input-signal overvoltage conditions, standard analog switches are affected by unintended signal glitches (lack of signal-off isolation) and excessive current leakage. Deficit in off isolation can lead to system data-acquisition or processing problems from unintended signals bleeding through the switch.

Current leakage - which is more serious than off-isolation - results in device failures and potential product returns. Today, specialized power-off protection circuitry is available for new analog switch products, allowing switches to withstand over voltage conditions and assuring maintenance of signal-off isolation.

System defense
There are situations in which an analog switch is desirable for use to ensure signal isolation when the switch is not powered. Aside from power-up sequencing, other applications in which power-off protection is desirable include hot-plug insertion, transient signal blocking and system-fault conditions.

In the power-up sequence case, some functional systems are powered on before others. Often, this results from different voltage requirements that cause multiple internal power rails. Generally, an analog switch is powered with the highest supply rail available for best performance.

This means that components using the lower VCC rail, such as system processors, are powered on before the next higher-voltage analog chipset. For example, if the analog switch routes control data and the GPIO controller is fully powered before the analog switch, the controller can send a signal to the switch input before it has fully turned on.

The analog switch must be powered on to guarantee correct functioning based on its own control inputs. On a standard analog switch, a positive data signal appearing on the switch input before it has fully turned on does not guarantee correct signal handling.

Often, the system designer is aware of power-up timing mismatch and relies on the analog switch to isolate input from output. However, the signal can bleed through unless the analog switch has a specific circuitry to guarantee off isolation in the power-off case.

Signal bleed-through results in false logic states, which derails system startup. Signal bleed through can even occur simultaneously on both output pins of an SPDT switch regardless of OE and S pin states.

When the VCC pin is floating or is weakly pulled down, the switch input signal Vsw powers up the switch's internal circuitry, thus, signal bleeds through the switch ( see Figure 1a, below). With the internal VCC node (indicated as Vsw-0.8V) powered up, the switch will turn on, pass the input signal and cause a positive voltage on the unselected output.

Figure 1: (a) With a floating VCC pin, Vsw powers up and signals bleed-through. (b) In an overvoltage condition, a typical analog switch exhibits current leakage.

For applications in which the analog switch is used as protection against transient noise or fault condition, the switch is often at the system periphery to separate internal components from the outside. In a fault-protection application, the switch also withstands such a condition for a long time (milliseconds).

When the positive input voltage is sustained, as in a fault-condition or power-up sequence, it can irreversibly damage the analog switch. This damage results from excessive current from the switch input ports to a grounded switch VCC pin (Figure 1b, above).

This current path results from the inherent switch-parasitic PMOS bulk diode acting like a forward-biased diode when input voltages are greater than VCC+0.5V. The diode requires a minimum forward voltage for conduction, which is about 0.5V.

This diode allows excessive current flow through the chip and into the VCC pin. The greater the voltage on the input pin, the greater the current will be. This voltage-current relationship is exponential and is represented with an ideal-diode curve. As a result, the maximum current rating of the chip can be quickly exceeded.

Once a part is damaged from an overvoltage event, the part will most likely exhibit excessive leakage and may not function even with inputs returned to normal operating conditions.

Robust design
Switches with power-off protection have unique circuitry that prevents unintended signal bleedthrough and guarantees system reliability during an overvoltage condition. When VCC = 0, the switches will isolate input signal from outputs regardless of the state of the enable pins or select pins, thus preventing unintended signal bleed-through.

It will also protect against current leakage from the signal pin into the supply pin. The input signal will have high-impedance input when the switch is powered down, preventing any parasitic PMOS bulk diodes from being forward-biased. It is important to note that unless specified, power-off protection is on one port and not on both sides of the switch.

On first-generation power-off protected switches, protection has been added to the common pin because this port often sees an over voltage event. The system designer must carefully read the datasheet for proper switch con- figuration and protection against anticipated threats.

A system designer will likely inquire on how power-off protected switches run in a powered- up system in which an input signal is greater than VCC. For example, the switch is powered by VCC = 2.8V and Vsw = 3.6V. In this case, the power-off protected switch will not protect the system from excessive current leakage to VCC, thus, datasheet absolute maximum ratings must be observed.

In a typical switch, Vsw can exceed VCC by 0.5V. However, any voltage in excess of 0.5V should be avoided, as it causes reliability failures.

In the example, the VCC supply should be increased to equal the maximum value of the switch input signal. If this is not possible, VCC should be within 0.5V of VSW. The SPDT switch will ensure that the unselected output will not have any signal bleed-through.

The selected output will still pass the full value of the input signal. Referring to the case just described, if VCC were increased to 3.3V, Vin of 3.6V would pass through to the selected output.

Future power-off protected switches will further increase this range, allowing the switch input swing to exceed VCC to a maximum level regardless of the VCC supply. 

In the meantime, a simple schematic work-around solves this problem. Inserting a 100 ohm series resistor between the switch VCC pin and supply rail can protect the switch against damage during a powered-up overvoltage condition.

The 100 ohm resistor limits current flow back into the VCC rail to a safe operating range. Finally, datasheet limits always apply with regard to maximum over voltage conditions in both cases, whether the parts are powered up or down.

Travis Williams is Sr. Applications Engineer at Fairchild Semiconductor.

To read a PDF version of this article, go to "Power-off protection for robust analog switches."

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