The latest MCUs make it feasible to include programmable I2C slaves in low-cost systems.
Most low-speed serial devices communicate with each other using the I2C bus. Although there's a wide variety of I2C slave ICs, programmable I2C slaves are rare. One such programmable slave is the microcontroller (MCU). Forcing a microcontroller to emulate an I2C slave device isn't a difficult task, but until recently, serious problems hampered this approach. New low-cost, low-power microcontrollers now make it feasible to include programmable I2C slave devices in inexpensive systems.
Typically an I2C system is constructed from one master and many slaves. Such systems can be broken down into a larger number of subsystems, each controlled by a dedicated inexpensive MCU. Each subsystem connects to a faster (and typically more expensive) master. This approach lets engineers develop several subsystems in parallel, all of which link to the master controller with little additional design effort, as shown in Figure 1.
A hypothetical subsystem might include a linear-position sensor, a linear slide driven by a stepper motor, and code that controls this motor based on sensor feedback. Integrating the code into the main firmware of a single-processor system is no easy feat. It's easier to write the firmware for a dedicated microcontroller found within a subsystem. The main processor repositions the linear slide by writing an 8- or 16-bit position value to an I2C register. As an added benefit, the subsystem designer needn't worry about other real-time system processes hoarding MCU resources, which could interfere with the digital control system.
Data transmission on the I2C bus is accomplished using two wires (plus ground) and a regimented protocol. Transmissions are always initiated by the master regardless of the data flow direction. Each transmission is framed by an I2C-Start and an I2C-Stop condition.
Data are transmitted serially in byte-wide increments. Typically, the first byte is the slave's 7-bit address followed by a read/write (R/W) bit (possible exceptions are the 10-bit addressing and HS-mode prefix). Subsequent data are transmitted from or to the slave depending on the logic level of the R/W bit. All data bytes are followed by an acknowledge bit that's used, not only as an indicator of data integrity, but also as part of the flow-control scheme.