MSP430
The MSP430 is an ultra-low-power, 16-bit MCU from Texas Instruments. It allows for a clean atomic transition to any of the five supported low-power modes because the bits controlling the various clock domains and the general interrupt enable (GIE) bit are all located in the same CPU status register (SR).
2
The code in Listing 2 for the GNU gcc MSP430 compiler shows how to atomically transition to the LPM1 low-power mode and simultaneously enable the interrupts. In particular, the macro _bis_SR_register (LPM1_bits | GIE) generates a single machine instruction BIS.W #0x58,SR, which atomically sets bits 0x58 in the SR (status register). The bit 0x10 (CPUOFF) turns the CPU clock off, while the bit 0x08 (general interrupt enable) enables interrupts.
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While atomic transition to any low-power mode is natural in the MSP430, you have the opposite problem: in each ISR you must explicitly disable the low-power mode in the stacked SR, so that the machine doesn't automatically return to the low-power mode, but rather the background loop can continue after the ISR restores the SR from the stack as part of the return from the interrupt. Luckily, this is quite simple with the intrinsic functions provided by most C compilers for the MSP430. Listing 3 shows the ISR example for the GNU gcc compiler for MSP430.
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