System designers face a number of key questions during the architecture phase of their project. Increasingly one of these questions is whether to use an FPGA (field programmable gate array) or a DSP (digital signal processor). To answer this question, system designers consider parameters such as:

• System performance requirements for signal processing
• Power consumption
• Component count and form factor
• Future product/system road-map and upgradeability for the system
• Economic parameters such as non-recurring engineering (NRE) investment, bill-of-materials (BOM) cost, time-to-market and project risk

The decision also depends on the technology familiarity factor. In some cases, the design team is well-versed in DSP systems but has little FPGA background, or vice-versa. In such cases, the team skill-set may drive the choice between FPGA and DSP. For example, Nuvation recently worked on an algorithm acceleration project where the algorithm lent itself to wide parallel implementation in an FPGA. However, classic FPGA approaches were ruled out due to the lack of FPGA skills in the client's engineering team and the potential barriers this presented to product lifecycle maintenance.

We acknowledge that most engineers and system architects are more familiar with DSP technology due to the simplicity of designing with DSPs. This is a clear advantage for DSPs. However, developer familiarity varies widely across design teams, so it is difficult say how important this issue is to a "generic" design team. Thus, this article ignores this DSP advantage and assumes that the choice of technology does not depend on developer familiarity.

In order to choose between FPGA and DSP, we look at system performance requirements for signal processing and BOM cost. We consider devices from a major DSP vendor (Texas Instruments) and a major FPGA vendor (Altera) to guide us through this process. We identify some of the signal processing applications in which each specific technology is clearly superior. We also consider where an FPGA may be used as a co-processor to a DSP chip.

DSP devices from Texas Instruments
Table 1 lists principle DSP devices from Texas Instruments (TI) in different cost categories. This table summarizes the cost/performance data of more than 160 DSP devices. As shown in Table 1, DSPs achieve cost/performance in the range of 1.8 to 48 cents per MMAC (millions of multiply-accumulate operations per second).

Note that the table foot-note provides details relating to each device family. The cost/performance data presented in this table should be considered in conjunction with these details. For example, each DaVinci digital media processor incorporates an ARM9 processor (at up to 297 MHz), a TMS320C64x+ DSP core (up to 4752 MIPS, and eight 8-bit MACs per cycle for up to 4752 MMACS) as well as many peripherals and internal memory.

In Table 1, specific device names are excluded and only overall performance/cost ranges are categorized based on the device cost belonging to a certain family. Some families appear multiple times in the table as there are multiple devices within each family; some of which belong to different cost categories.

(Click to enlarge)
Table 1. DSP device families from Texas Instruments in different cost categories.

Table notes:
(1): The device cost is based on 100u volumes. Pricing info was obtained from www.ti.com in January 2008.

(2): MIPS is defined as the number of instructions that can be executed in millions per second. A range of MIPS are available in various devices within each family.

(3): MMAC is defined as the number of single precision floating-point or fixed-point multiply-and-accumulate 32-bit operations that can be executed in millions per second. MMAC performance values increase by a factor of 2x and 4x for 16-bit and 8-bit operations, respectively. All operations assume no truncation of multiplication results (i.e. results are twice the size of operation bit-width: 32-bit multiply generates 64-bit result; 16-bit multiply generates 32-bit results, etc).

Device Family Notes:
The following notes provide a collective information summary on features and capabilities offered within each device family. For specific and complete device capabilities refer to www.ti.com.

DaVinci Digital Media Processors include on-chip ARM9 processor, Ethernet MAC and/or Switch sub-system, Video/Audio Ports, Video Processing Subsystem, High Definition features, PCI Bus Interface, ATA Interface, USB Interface, etc.

C6000 Fixed Point DSPs include Viterbi Decoder Co-processor, Turbo Decoder Co-processor, UTOPIA Slave 2 ATM Controller, PCI Bus Interface, RapidIO, Ethernet MAC, etc.

C6000 Floating Point DSPs include Single/Double precision floating point DSP core, Enhanced CPU core, Audio Port, Dual Access Internal Memory, etc.

C5000 Fixed Point DSPs include Dual/Quad Core DSPs, On-chip ARM7 Processor, Video Hardware Accelerator, ADC, USB, etc. This family includes low power devices and devices targeted for IP-Phone and Client Side Telephony applications.

C2000 Digital Signal Controllers include 16/32-bit Core, Internal Flash Memory, 10/12-bit ADC (multi-channel), PWM, etc. This device family is targeted for Control Applications.