Unified design tools have a fundamentally different view of the design process and the data on which it operates. Because they treat electronics design as a single, all-encompassing design process, they use a single centralized design data model that accommodates all aspects of the FPGA device including its electrical, functional, and physical characteristics. This model goes beyond an integration model because it refuses to treat the process of design as being a sequence of disparate and isolated processes. Instead, it provides:

• A single coherent 'model' of the design
• A single coherent 'model' of the components used
• A single design process for all aspects of development

In this model, a unified design system also provides:

• A single design data storage model
• A single design application with a single user interface

Pertinent design information is centrally accessed and can be used across any of the design activities that might benefit from it. Design data entered by the FPGA designer is automatically made available to the PCB designer and vice-versa. Data propagation is greatly simplified since it does not require management across multiple disparate processes (see Fig 5).

5. Compare to Fig 2. Choosing a unified design tool with a unified data storage. Approach simplifies the entire design process, including pin swapping..
(Click this image to view a larger, more detailed version)

A unified design system relieves designers from managing the tedium of complex data synchronization and lets them focus on developing the core features of the product. This is a far more profitable endeavor given that it is those features that will provide the product with its market differentiation, and it is the speed at which the product gets to the market that will drive its market share and ultimate profits.

When compared with manual pin swapping and synchronization processes, a unified design tool can bring considerable savings. For low pin-count devices, the savings are modest but as the pin-count increases, the savings become much more substantial.

For example, on a very high pin-count device with 1760 pins, the FPGA designer may take up to 1 hour to completely specify the pin swapping rules. But once that is done, pin swapping along with any data synchronization can be fully automated. The savings can extend into several tens of thousands of dollars (see Fig 6)

6. Savings resulting from using a unified design tool are equal to the cost of manual pin swapping and synchronization less the time required to setup pin swap rules.

As this graph demonstrates, the costs of manually pin swapping high pin-count devices continue to increase. But with a unified design tool, the only 'cost' is in the setup of pin swapping rules. After that has been done, pin swaps can be automated and synchronized without any additional time or cost to the design, ultimately saving more each time there is a design iteration.

The proliferation of FPGAs will continue to increase over the coming years and the management of their complexity will stand as a major obstacle to companies that do not invest in the right design tools. Design unification should be a key consideration when making any purchasing decision.

Conclusion
The emergence of FPGAs into the mainstream of electronics product development brings many opportunities. There remain good commercial and design benefits associated with the use of FPGA devices, and the execution and synchronization of pin swapping data across schematic, PCB and FPGA design centers must be carefully managed to tap these benefits.

Traditional design synchronization models treat board-level and FPGA design activities as disparate processes and do not adequately deal with the complexity of high pin-count FPGAs. As a result, they sap time and resources away from the core product development efforts and can cost companies dearly in lost market opportunities and profits.

The unified data model along with an associated unified design tool is the best solution for managing the complexity and challenges presented by FPGAs. It encapsulates all aspects of the design into a single, coherent model that can be worked on from within a single design application. By centralizing the design process, design data such as pin swapping information can be captured and synchronized more efficiently and seamlessly across the PCB and FPGA domains, allowing time to be spent focusing on the higher value design areas.

FPGAs are offering many opportunities to companies engaged in the development of new and exciting electronic products. Given a unified electronics design tool, it is possible to overcome the increasing management complexity of developing with modern FPGA devices and harness their benefits.

Marty Hauff has a B. Eng. in Computer and Digital Systems and has recently concluded PhD level studies in Hardware / Software Codesign for FPGA-based Embedded Systems.

Prior to joining Altium in 2006, Marty has worked both as a professional engineer designing embedded systems for the high-volume automotive market as well as lecturing at the post graduate level. Marty is presently engaged in the writing, design and creation of Altium Designer training videos.