CMP EMBEDDED.COM

Login | Register     Welcome Guest   IPS  
HOME DESIGN PRODUCTS COLUMNS E-LEARNING CONFERENCES CODE FORUMS/BLOGS NEWSLETTERS CONTACT FEATURES RSS RSS

Signal Integrity Engineer's Companion: The Wireless Signal--Part VII
Chapter 10 of the Signal Integrity Engineer's Companion is a discussion of new techniques in wireless signal measurement and thought-provoking ideas about signal analysis in the modern wireless environment. Part VII covers applying real-time spectrum analysis.



Mobile Handset DesignLine
Part I
Part II
Part III
Part IV
Part V
Part VI

APPLYING REAL-TIME SPECTRUM ANALYSIS
Real-time spectrum analysis adds the time domain to spectrum and modulation analysis. Triggering is critical to capturing time domain information, and trigger functionality provides the ability to detect and correct signal integrity errors in common with the oscilloscope and logic analyzer. The most common trigger system used in benchtop instrumentation is the one found in most oscilloscopes. In traditional analog oscilloscopes, the signal to be observed is connected to one input, and the trigger is connected to another, or the trigger is extracted from the captured signal. The trigger event causes the start of a horizontal sweep. The signal's amplitude is shown as a vertical displacement superimposed on a calibrated graticule. In its simplest form, analog triggering allows events that happen after the trigger point to be observed, as shown in Figure 10-17.


The ability to represent and process signals digitally and with a large memory capacity allows the capture of events before and after the trigger point. Digital acquisition systems of the type used in a typical RSA use an ADC to fill a deep memory with time samples of the received signal. Conceptually, new samples are continuously fed to the memory while the oldest samples fall off. Figure 10.18 shows a memory configured to store N samples. The arrival of a trigger stops the acquisition, freezing the contents of the memory. The addition of a variable delay in the path of the trigger signal allows events that happen before a trigger as well as those that come after it to be captured.


Consider a case in which there is no delay. The trigger event causes the memory to freeze immediately at the trigger point and store a sample concurrent with the trigger point. The memory then contains the sample at the time of the trigger, as well as N samples that occurred before the trigger. Only pre-trigger events are stored. Now consider the case in which the delay is set to match exactly the memory's length. N samples are then allowed to come into the memory after the trigger occurrence before the memory is frozen. The memory now contains N samples of signal activity after the trigger. Only post-trigger events are stored.

Both post- and pre-trigger events can be captured if the delay is set to a fraction of the memory length. If the delay is set to half of the memory depth, half of the stored samples are those that preceded the trigger and half of the stored samples that followed it. This concept is similar to a trigger delay used in the zero span mode of a conventional swept SA. However, an RSA typically can capture much longer time records; this signal data can subsequently be analyzed in the frequency, time, and modulation domains. This is an important measurement technique for applications that require signal monitoring and SI troubleshooting.

Next: RTSA Trigger Sources and Data-Capture Techniques

About the Authors
Dr. Geoff Lawday is Tektronix Professor in Measurement at Buckinghamshire New University, England. He delivers courses in signal integrity engineering and high performance bus systems at the University Tektronix laboratory, and presents signal integrity seminars throughout Europe on behalf of Tektronix.

David Ireland, European and Asian design and manufacturing marketing manager for Tektronix, has more than 30 years of experience in test and measurement. He writes regularly on signal integrity for leading technical journals.

Greg Edlund Senior Engineer, IBM Global Engineering Solutions division, has participated in development and testing for ten high-performance computing platforms. He authored Timing Analysis and Simulation for Signal Integrity Engineers (Prentice Hall).

Title: Signal Integrity Engineer's Companion ISBN 0131860062, Prentice Hall, Chapter 10: The Wireless Signal.

Reproduced by permission of Pearson Education, Inc., 800 East 96th Street, Indianapolis, IN 46240. Written permission from Pearson Education, Inc. is required for all other uses. The book can be purchased at: Purchase.

1

Rate this article: Low High
Current rating
  • .
Embedded.com Career Center
Ready for a change?
SEARCH JOBS

Browse all jobs

SPONSOR
RECENT JOB POSTINGS





 :