Cable and Satellite content providers are continually introducing new services into a fearlessly competitive market. These new features include internet access, video on demand, DVD/CD players and hard disk drives, which are causing simple set-top boxes (STB) to evolve into highly capable home gateways. These advanced boxes establish a local area network (LAN) within the home. Consequently, they typically have an Ethernet or FireWire port or some other means of communications-possibly even Bluetooth. In turn, these more sophisticated STB's require more power. As the power for these systems increases, so does the system architect's concern about temperature rise, time to market, efficiency, regulatory approval, cost, power sequencing and power factor correction (PFC).

One way to address these concerns is to change the power supply architecture from the traditional multiple output flyback power supply to a higher performance, more flexible distributed power architecture with point-of-load (POL) regulators. Most current STB's use offline multiple output flyback power supply architectures. These power supplies provide as much as 30W of power with conversion efficiencies in the 65% range. Advanced set-top box supplies provide up to 65W with a single distributed DC voltage such as 12V, and use downstream POL regulators yielding a combined conversion efficiency of up to 80%.

The services that content providers offer determine the features of the STB, such as processor power, modem speed, transmission medium, inclusion of DVD or hard-disk drive and the number of I/O ports. The standard architecture of a STB is peripheral computer interface (PCI) bus based, which superficially resembles to a notebook PC. Although the architecture of a PC is the same throughout the world, the architecture of a STB varies significantly from region to region and even manufacture to manufacture. Of course, due to the fickle nature of the consumer, the configuration of a STB is in a constant state of flux as the services demanded are constantly changing. Naturally, features determine the power supply requirements and the only obvious trend is that the system power is increasing. Competition among service providers and regional variations mean that there is considerable pressure to get STBs to market on time. Delays due to the power supply design are intolerable due to potential loss of market share.

It is not uncommon for STB power supply requirements to change late in the design cycle. Nevertheless, the last thing wanted is for the power supply to delay the STBs development, but that can happen if the use an offline multiple output flyback supply is needed. To design such a supply, and to obtain the required safety and EMI approvals, can take six to nine months-or even as long as a year. With a multiple output flyback design, late changes can necessitate lengthy magnetics design iteration. As a result, in some cases, desperate designers have added diode drops to accommodate last minute output voltage or current needs.

Standard off-the-shelf AC input (90-264VAC) single output power supplies offer the advantage of using a safety agency and EMI approved power supply. These supplies provide up to 90% efficient power conversion from a single output voltage ranging from 3.3V to 48V. Furthermore, standard off-the-shelf single output power supplies are inexpensive, are offered in several sizes and are in high-volume production for numerous applications. Using this scheme could cut six months from the development cycle. Even if the maximum power goes up, the designer can plan for a 20% to 30% buffer from the beginning of the development in anticipation of needing more power without much of a sacrifice in cost or real estate.

PFC is another issue that affects STB power supplies. The IEC/EN61000-3-2 specification limits the harmonic current emissions for line-powered systems having an input power of 75W or greater. In effect, this specification requires additional circuitry when the input power exceeds 75W. A 65% efficient multiple output flyback can supply a maximum of 49W output power without requiring extra PFC circuitry. A distributed power supply with 90% efficiency, combined with 90% to 95% downstream POL regulators, can make 60W to 64W available without requiring PFC. This higher efficiency has the obvious benefits of reduced heating, less ventilation and higher mean time between failures (MTBF).

Linear Technology offers a complete line-up of high efficiency synchronous POL DC/DC switching regulator's including modules, monolithics and controllers. The LTC3850 is a recently released POL dual output DC/DC switching regulator controller that can convert 12V to 5V/5A with 95% efficiency, or 12V to 3.3V/5A with 92% and 12V to 2.5V/5A with 91%.

The LTC3850 is a dual output synchronous step-down switching regulator controller that drives all N-channel power MOSFET stages. Its' 4V to 24V input range encompasses a wide variety of applications including most intermediate bus voltages. The strong on-board driver allows the use of high power external N-Channel MOSFETs to produce output currents up to 20A with output voltages ranging from 0.8V to 5.5V.

The schematic in Figure 1 shows an LTC3850 based circuit that operates from a 7V to 24V input, at a switching frequency of 530kHz, requires no current sense resistors and provides separate outputs of 2.5V/5A and 3.3V/5A. By using the inductor's DC resistance as the current sense element, the application dissipates as little power as possible at full load currents.

Figure 1: CD Dual 3.3V/2.5V output LTC3850 schematic from a 7V to 24V supply.
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The efficiency of rge regulator in Figure 1 is above 90%, as shown in the efficiency curve in Figure 2.

Figure 2: Efficiency curve of Figure 1 circuit.
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Tracking provides a predictable method of slewing the output voltages up or down. Tracking generally holds the feedback voltage to the lesser of the internal reference voltage or the voltage on the TRACK pin. The LTC3850 goes further by combing track and soft start functions (TK/SS pin) in a single pin for each channel and by tailoring the mode of switching operation to the state of this TK/SS pins. Figure 3 shows coincident and ratiometric tracking, either of which can be configured using the LTC3850.

Figure 3a: Coincident mode of output voltage tracking with the LTC3850.
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Figure 3b: Ratiometric mode of output voltage tracking with the LTC3850.
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Any regulators feedback loop stability can be checked by looking at the load current transient response. Switching regulators take several cycles to respond to a sudden change in output load current or input line voltage. When a step-load occurs, VOUT shifts by an amount equal to ILOAD x the ESR of the output capacitor, where ESR is the effective series resistance. ILOAD also begins to charge or discharge COUT generating the feedback error signal that forces the regulator to adapt to the current change and return VOUT to its steady-state value. During this recovery time VOUT can be monitored for excessive overshoot or ringing, which would indicate a stability problem. Figure 4 below shows the transient response of the LTC3850 circuit in figure 1. The recovery is well damped and has less than a 50S settling time to a 50% load change. The output voltage maximum deviation from nominal can be reduced with the addition of more output capacitance.

Figure 4: LTC3850 Transient response of the circuit in Figure 1.
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Light Load Operation

At heavy loads, the LTC3850 operates in constant frequency PWM mode. At light loads, it can switch in any of three modes: continuous, pulse skipping or Burst Mode' operation. Burst Mode operation switches in pulse trains of one cycle to several cycles, with the output capacitors supplying energy during intervening sleep periods. This provides the highest possible light load efficiency. Forced continuous mode offers PWM operation from no load to full load, providing the lowest possible output voltage ripple. Pulse skipping mode operates at a constant frequency, but always turns off the synchronous switch before the inductor current is allowed to reverse. This method reduces light load ripple compared to Burst Mode operation and improves light load efficiency compared to forced continuous mode.

Each channel also features a separate RUN pin with a precision 1.2V turn-on threshold. When the LTC3850's own current source is used to charge the soft-start capacitor, bringing a channel's RUN pin high causes its soft-start capacitor to begin charging within about 80s. As an alternative, either RUN pin can remain high while the TK/SS is held low, which keeps the internal 5V regulator enabled as a standby supply. This feature can be used to power a wake-up circuit, which controls the state of both TK/SS pins.

Fixed Operating Frequency/Minimum On-Time

The LTC3850's two channels run out of phase, which reduces the input RMS current ripple and thus the input capacitance requirement. Switching frequency can be adjusted from 250kHz to 780kHz, either set with a voltage on the FREQ/PLLFLTR pin, or synchronized to an external clock into the MODE/PLLIN pin using phase-locked loop. During high frequency operation, the LTC3850 can operate normally at low duty cycles due to its short top switch minimum on time. For example, a 15V to 1.1V converter operating at 700kHz requires a minimum on-time of less than 104ns (see equation below).

The LTC3850 can cycle its strong top gate drivers in just 90ns, making this low duty cycle application a reality.

The LTC3850 features a fully differential comparator to sense current through the inductor. The SENSE+ and SENSE- pins can be connected to a current sense resistor in series with the inductor, or to an RC network in parallel with the output inductor for energy efficient sensing across the inductor's DC resistance (DCR sensing). DCR sensing prevents power loss through sense resistors, but has a typical built in error of 5% - 10%, which is acceptable for most applications. The LTC3850 can use either method for design flexibility and has a choice of three pin-selectable current limit thresholds.

When an output experiences a short circuit, the LTC3850 protects the input supply and power components by limiting peak current cycle by cycle. The main MOSFET turns off when 130% of inductor's peak current sense threshold of VSENSE (MAX)/RSENSE is reached. VSENSE(MAX) can be set to 30mV, 50mV, or 75mV for a wide variety of output current levels. Duty cycle has very little effect on current limit. For load currents greater than the programmed maximum but less than a hard short, the LTC3850 gracefully folds back the top MOSFET's on-time, reducing the output voltage. The LTC3850 also protects against undervoltage input and overvoltage output voltages. The RUN pins can be referenced to a voltage divider from VIN, so that their precision thresholds control the state of the outputs. If the output voltage is more than 7.5% above its target, the bottom MOSFET can remain on until regulation is recovered. If the LTC3850 is allowed to operate with input voltage approaching the programmed output voltage, its duty cycle can be as high as 97%.

The LTC3850 provides several features in small 4mm x 4mm QFN-28 (0.4mm pitch), 4mm x 5mm QFN-28 (0.5mm pitch), or 28-pin narrow SSOP packages. It operates at high efficiency with or without DCR current sensing. Tracking, very fast response time, strong on-board MOSFET gate drivers, 2-phase operation, external synchronization and low cost allows the LTC3850 to be used for set-top boxes and many other applications.

Conclusion

POL regulation can add performance to STB designs by being more efficient than traditional multi-output off-line custom flyback power supplies. It allows a higher output power without needing extra PFC circuitry and enables a quicker time to market by using an off-the-shelf regulatory approved single output power supply with highly efficient POL downstream regulators. With its variety of features, high efficiency and small package size, the LTC3850 offers the power supply designer an ideal solution for STBs.