Solid state imaging began with the invention of the charge-coupled detector (CCD) in 1969. The first imagers based on complementary metal-oxide semiconductors (CMOS) appeared a few years later. The CMOS approach allows for a more integrated solution and consequently now dominates the market except, for niche applications where optical performance or imager resolution is paramount. Solid state imagers remained a specialized product until 2001 when a common intermediate format camera debuted on a mobile phone. The demand for solid state cameras exploded and it is expected that in 2009 the production volume will be around 2.5 billion units for applications that range from camera phones, web cams, and automotive to security, machine systems and toys.

As the production numbers increased, the price of solid state cameras decreased through improvements in manufacturing efficiency. However, as shown in Figure 1, the price of camera modules is not only already anomalous, compared with other imager categories, but through ongoing technical development there is a realistic possibility of achieving the sub-$1 camera module.

Figure 1. Relationship between price and resolution for four common imaging device categories. Camera modules benefit from extremely high manufacturing volume and technical innovation to deliver a very low price per pixel. Source: Tessera.

Camera module price drivers
The principal determinant of the price of a camera module is the imager diagonal; the relationship being almost a cubic power. This arises because the imager diagonal strongly influences the die size and hence the silicon cost per die, and also dictates the diameter of the mating optics--hence their cost. One way to decrease imager size is to use smaller pixels. Image sensor manufacturers have progressively decreased pixels dimensions. The current norm is around 1.75um and most companies have road maps out to 0.9um, an evolution that will result in approximately 60 percent more die per wafer without increasing the processing costs.

Another option means to reduce camera module cost is to decrease the number of elements in the optical train. A mega pixel camera from just a few years ago would have had up to four glass lenses. Now, most, if not all, lenses are manufactured by injection molding of plastic simply for reasons of cost. The next development is to condense the optical train to a lens. This provides significant savings in the cost of the camera module but adversely impacts the image quality. Because the optical aberrations are both known and fixed, it is possible to use embedded algorithms to restore the picture quality. By necessity, every CMOS imager already contains an image processing pipeline so the cost of adding a few additional gates to perform lens correction is negligible.

The manufacturing yield of image sensors is lower than for conventional CMOS die. This is because an imager must have both electrical and optical functionality. Low yield is, of course, just cost in another guise. The problem is that the optically sensitive area of the die is extremely delicate and generally incompatible with semiconductor back-end and camera module assembly processes. The solution currently being adopted is wafer scale packaging. It is predicted that by 2012 nearly 70 percent of imagers will be housed in this type of protective enclosure. Wafer scale packaging provides consequential benefits, one of which is that the imager can be presented as a surface mount component. The solder interconnect dispenses with the expensive flexible circuit and connector that are otherwise necessary and are also the major cause of field failures of camera modules in cell phones.

The most recent innovation in camera module technology aimed at decreasing cost and module dimension, is the wafer level camera. The technology now exists enabling the manufacture of whole wafers of identical optical components. As with any wafer scale process, the resulting cost per part is very much lower than piecemeal manufacturing. Mating of the wafer scale optical components with imagers packaged at the wafer scale can then be done with great precision. This makes it possible to eliminate the most costly step of discrete camera module manufacturing, which is where each part has to set in an optical test bench, powered up and the optics adjusted for best focus.

Conclusions
Solid state camera modules are manufactured in vast numbers. Not surprisingly, there is great endeavor to decrease the cost of these components. Some approaches are incremental, like the progressive reduction in pixel dimensions and the reduction in the number of optical elements. Others are more revolutionary, such as the switch to wafer scale packaging of imagers, production of optical components and the manufacturing of camera modules. The combination is delivering substantial reduction in the price of camera modules to the point where the sub-1$ component is economically viable.

See related articles:

Tessera unveils manufacturing services--Objective--$1 camera module

Image capture and processing challenges--and solutions--in portable designs--Part I

Image capture and processing challenges--and solutions--in portable designs--Part II

About the Author
Giles Humpston, Ph.D., serves as Director, Research and Development of Tessera. Dr. Humpston has spent his entire professional career working in the field of semiconductor packaging, initially for military applications and more recently for high volume consumer products. He is a metallurgist by profession and has a doctorate in alloy phase equilibria. Dr. Humpston is a cited inventor on more than 75 patents and has co-authored several textbooks on metallic joining processes. His work and technical publications have been recognized by five international awards. Dr. Humpston's current interests are packaging of solid state camera modules and product miniaturization through wafer level technologies. He can be reached at: ghumpston@tessera.com