Sampling analog signals at billions of times per second requires very carefully designed mixed signal systems. Time interleaving or synchronising multiple converters is a recognised system level issue. Here, we explore the inherent design challenges and provide useful guidelines for interleaved analogue to digital converter (ADC) system design. Analog input signal conditioning, clock design and layout, gain and phase matching are discussed. FPGA data handling and capturing is also explored. Innovative new ADC integrated features for interleaving are introduced and measured FFT results are presented.

The ADC08xxxx gigasample family of ADCs can enable high performance data acquisition systems at very low power - which is often the limiting factor in such systems. When and why is it an advantage to increase sampling frequency and how much sampling speed is required? There are several answers to this question. Essentially an ADC's sampling speed directly determines the instantaneous bandwidth that can be digitised in one sampling instant. The Nyquist and Shannon sampling theorems state that the maximum available sampling bandwidth (BW) is equal to the half the sample frequency (FS):

BW = FS/2

A 3GSample/s ADC allows a 1.5GHz analogue bandwidth signal to be instantaneously sampled. Doubling the sampling speed also doubles the sampling bandwidth to 3GHz. The converter front end of course must also be able to accommodate this bandwidth. The inherent increased sampling bandwidth gained by time interleaving is beneficial in many applications.

Software radio architectures, for example, can increase the number of information channels " and therefore the throughput " that can be handled. Over-sampling a signal also allows progressive gain benefits in the digital domain by means of digital filtering. Doubling the Nyquist sampling rate gives a 3dB improvement in dynamic range. Every further doubling of the sampling frequency provides an additional 3dB of dynamic range.

Figure 1. Time domain measured plots of 247.77 MHz signal sampled at 30 (top) and 8 (bottom) GSPS sample rates

There are several other advantages gained by increasing sample frequency. Increasing FS increases resolution in LIDAR systems, which operate on the principle of time of flight (TOF) measurements.

Digital oscilloscopes also require high FS to input frequency ratios, for acquiring fast analogue or digital signals. If the scope sampling frequency is too low, a square wave no longer looks like a square wave. Figure 1 above illustrates the benefit of doubling sampling frequency in an oscilloscope front end.

The 6Gsample/s waveform is a much better representation of the true analogue input. Many other test instrumentation applications, such as mass spectrometry, depend on high over-sampling ratios for pulse shape measurements.

Time interleaving ADCs presents three difficult challenges; accurately aligning sampling clock phase, channel to channel analogue gain and offset matching, and output digital data synchronisation. Luckily, National Semiconductor's family of Gigasample converters have several innovative integrated features specifically addressing these challenges.