As our original quest is to improve the efficiency of our power subsystems, it is the power switch that has most impact, and here mostly these three effects (gate drive, switching and conduction losses) that offer a path to improvement. So what's new? The picture below shows the path across various device structures from planar to vertical and super junction MOSFETs.

Click on image to enlarge.

The picture above shows the classical planar MOSFET like above, in comparison the picture on the right shows a super junction MOSFET produced with multiple epitaxial layers.

Moore's law is unfortunately not applicable here. As lithographic equipment improves, device structures can be reduced and more active transistors can be squeezed in the same area. But two effects limit this: First, the electric field must remain below a certain strength, else the device structures will break down internally. Second, should an overvoltage be applied to the device, it is desirable to absorb the energy in a controlled way, requiring not only specific structures but also enough silicon volume to not destroy the device.

But not everything is bad. With the reduction in size of the individual transistor cells (usually arranged in stripes), the on-resistance could be vastly improved. So, for a given RDSON value, the chip became much smaller and more cost-efficient, but also required less gate drive power (this was also driven by improved device structures that reduce the internal capacitances at the gate). Today, a power MOSFET with a breakdown voltage of 600V at an on-resistance of less than 85mOhm (in a TO220 package) is possible, and that will reduce power losses in that particular spot more than 2x over previous generations.

A significant further improvement came with reducing the resistance of the bulk semiconductor material in the vertical transistor. In a power MOSFET, most of the action happens in just a few micrometers from the surface, and the thickness is just required for mechanical handling and to allow the depletion zone to stretch into the device depth, to not exceed the maximum electrical field strength. It is not surprising that significant development has taken place in making the wafers thinner, involving improved handling, to get rid of that unwanted resistance in the current path. In the newer device structures called "super-junction" MOSFET, the n-doping of the device is increased to reduce this resistance even further, and that is offset with p-doping brought into the bulk of the device so that the overall charge balance is preserved.

In the case of IGBTs, applying trench technology to reduce the size of the on-chip lateral isolation structures helps to reduce the chip size while maintaining performance. But these trenches need to support significant isolation voltages, so this technological step was not easy to achieve. The result is 25% lower conduction losses, and 8% lower switching losses, compared to previous generations. For heating applications, the widespread use of IGBT-based induction heaters then allowed to improve the efficiency from approx. 40% (with gas) to over 90%.