Using Programmable Logic for Efficient and Effective DSP Design

Doug Morrissey

July 22, 2008

Doug Morrissey

Voice over IP (VoIP) has become one of the fastest growing applications for both wireline and wireless telecommunications equipment manufacturers. Not only does VoIP afford end-users affordable access to voice calls, but it allows media gateway designers the ability to engineer equipment that serves many different purposes " a situation that typically would provide a cost benefit for both.

In the case of VoIP, however, the opposite is true. As VoIP gains greater and greater acceptance, profit margins for equipment manufacturers are minimized based on the competitive nature of the application and the high cost of designing IP PBX and multiservice access nodes (MSANs) at many different channel densities. Engineering costs are rising and product prices are declining.

Although many companies have designed proprietary hardware/software media gateway solutions, they must make compromises in order to offer cost-competitive products. As a result, most VoIP functionalities are best offered today using DSP technology, but not without a new set of challenges.

As media gateway or IP PBX designers tackle the daunting task of bringing a cost-effective product to market in a time-sensitive, ever-changing environment, the high-tech dilemma recurs: performance vs. functionality. The main problem with DSP technology is finding the perfect balance of performance and interfaces.

For example, designers often find that only the very high-end DSPs on the market can support their most sophisticated applications/interfaces, including SGMII Ethernet or RapidIO.

So, when it comes time to interconnect these DSPs in larger systems, a field programmable gate array (FPGA) is often used to glue devices together and perform functions such as back-pressure on packet transmission or packet classification. This is where programmable logic has found its way into hardware design.

Application portability is one of the key values of DSPs using programmable logic. The same underlying media processing technology can achieve performance results in application areas as diverse as:

- Large-scale media gateways
- IP PBX
- HMP media servers off-loading
- MSAN / Access equipment

Even though the basic feature set may be the same for all VoIP applications, requiring the same list of codecs and voice quality features, the interfaces required for each may be quite different.

For example, a PCI card designed for host-based media processing (HMP) off-loading would require a PCI Express interface, whereas a MSAN may require a lightweight interface to an Ethernet PHY and to T1/E1 framers, as well as a lot of glue logic to the various components on the board.

One of the beauties of DSPs for the designer is the inherent ability to make the solution unique " not an off-the-shelf, one-trick pony. This technology flexibility allows designers to explore more cost-effective ways of doing things, but they can often find that they are limited by what their DSPs support.

This is where programmable logic " FPGA " provides the added enhancement. For example, in an IP PBX, the USB, rather than Ethernet, is the ideal interconnect for low-cost systems.

Not only is it hot-pluggable by design, a USB hub device is less expensive and less complex than an Ethernet switch, which means that the base cost for a system is lower. In addition, as a system grows " particularly a blade-based system -- the incremental cost is lower, because for each processing blade added to the system, very simple, low-cost RISC processors are available with USB interfaces.

Sadly, most DSPs provided to the VoIP gateway market do not offer USB support, leaving designers with only the high cost product model. Happily FPGA vendors provide IP cores for such an interface, allowing for newer, lower-cost innovation.

In a perfect world, a media gateway designer would be able to get exactly the interfaces needed, without the cost and side effects of buying a fully-featured DSP. But today, most high-end DSPs have multiple high-speed interfaces " many of which are not needed " and host a very large package with a very high pin count.

These large packages are dense ball grid arrays (BGAs) that are expensive and require a printed circuit board (PCB) with a high number of layers, which can all contribute to design delays.

Although some manufacturers have tried combining an FPGA with a DSP to achieve design nirvana -- particularly in cases where the DSP interfaces are judged inadequate or customization was required -- this solution can be overkill. It adds unnecessary cost and board real estate, only to correct short comings in the DSP.