Designing with core-based high-density FPGAs
One engineer's adventures designing with microprocessor-based FPGAs.
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Until recently, designers either had to work around the weak spots of the chosen device or combine the two devices; the latter approach presents new difficulties when the data rate between the signal processing and general processor is significant. Enter FPGA devices with built-in microprocessors, combining modern 32-bit microcontrollers and Ethernet media access controllers (MACs) with FPGA resources.
This article presents my experience with designing a nontrivial multiprocessor system, using three networked Xilinx Virtex-4FX-based controllers.
Problem and solution
The system being developed by my client was a high-powered, pulsed laser for a military application. Unlike laser pointers, which are continuous wave (CW) lasers, this system consists of four pulsed lasers, using a technique called Q-switching to emit a series of regularly-spaced laser pulses; the output of these four lasers are ultimately combined optically for the final output.1
So, in addition to general housekeeping, the client identified a need early on for a number of high-speed photodiodes to monitor various aspects of the generated laser pulses. Ultimately, this evolved into an eight-channel pulse detection and analysis system operating at 200 million samples per second (Msps) for each channel. Clearly, no embedded processor system was going to be able to handle that throughput, so an FPGA-based solution was envisioned.
At the same time, other requirements, such as a relatively large number of sensors (more than 200), a good number of actuators, and unique command and telemetry interface with an external host system for overall control and monitoring, argued strongly for a microprocessor-based solution.
The initial thought was to combine an FPGA with a microprocessor, but because it appeared the interface between the two would, in itself, provide a challenge, I decided to investigate the then-new Virtex-4FX devices (this was in the fall of 2005). In addition to the high-performance logic and memory resources expected in a modern FPGA, these devices incorporate several "hard IP" resources, specifically PowerPC 32-bit microprocessors and Ethernet MACs.
These hard IP (IP stands originally for intellectual property but is also used to identify a module that may be incorporated into an FPGA design, similar to a peripheral chip in a microprocessor board of old) augmented by a wide range of peripheral IP (such as interrupt controllers, serial ports, serial peripheral interfaces, memory controllers) provide the basis for a complete microprocessor system on a chip, with the benefit of supporting high-speed interfaces to custom logic entities.