Ultra-fine pitch devices pose new PCB design issues

Syed W. Ali, Nexlogic Technologies, Inc.

September 10, 2012

Syed W. Ali, Nexlogic Technologies, Inc.

BGA land size is created based on the ball size. Table 1 below shows an extract from IP-7351B “Generic Requirements for Surface Mount Design and Land Pattern Standard” when using NSMD. For NMSD, the pad size is typically reduced by 15% over the BGA diameter.

Table 1.Generic requirements for surface mount design and land pattern standard when using NSMD.

The other category focuses on SMD pads, also known as the “non-collapsing” category. SMD is used for devices that have 0.5mm or finer pitches. In this case, the land is created larger than the ball size. But the solder mask slightly encroaches over the land and the “exposed” or solder-able pad is slightly reduced, as shown in Figure 3 below.


Click on image to enlarge.

Figure 3. Solder mask and exposed solderable pad

The benefits of using SMD pads include solder mask protection on any traces routed between the lands (which by the way should never be done with pitches of 0.4mm or less.) Secondly, they help to secure the lands to the pre-impregnated composite (pre-preg) and prevent the joint from getting ripped away during mechanical stresses to the assembly. Table 2 below shows an extract from IP-7351B “Generic Requirements for Surface Mount Design and Land Pattern Standard” when using SMD.

Table 2. Generic Requirements for surface mount design and land pattern standard when using SMD

Once the proper type of solder mask definition based on the pitch of the BGA is determined, the next aspect is deciding on the fan out and the via structure. For 0.3mm ultra fine pitch, it is strongly advised to use via-in-pad technology, since there is no room to do a dog-bone type fan out.

Via in pad may still be relatively new to many board designers since a good number of OEMs have yet to venture into ultra fine pitch BGAs and CSPs. In those cases, those designers are still using conventional dog-bone fanouts.

However, once system designers move into ultra fine pitch devices and deploy via in pad, they’ll realize the technology helps reduce parasitic inductance, as well as increase density.

Density increases because the via is directly placed under the device’s contact pads, and at the same time, routing is improved. When the via is placed on the pad, it is filled with an epoxy and plated to give a flat finish. Via hole size should be 3 mils or even less if possible. Laser drills are typically used for these types of vias.

As the industry marches on towards more miniaturization, it is safe to predict a need for more processing power in gadgets like hearing aids and embedded medical devices. Even though phones and tablets may have stabilized in size and the trend is more toward system in chip than it is toward more shrinking, we definitely will be seeing more chips with pitches of 0.3mm and less.

Syed Wasif Ali is an advanced certified designer (CID+) and a layout engineer at NexLogic Technologies, Inc., San Jose, CA. He received his BSEE from N.E.D. University of Engineering and Technology in Karachi Pakistan.

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