Design Con 2015

IEEE-1394 and AS5643 bring deterministic networking to high reliability Mil-Aero designs

Richard Mourn, DAPTechnology B.V.

February 05, 2013

Richard Mourn, DAPTechnology B.V.February 05, 2013

For years, IEEE-1394 (FireWire) has been a successful and popular consumer electronics and computer interface. While that is true, the strongest design activity recently has been in other sectors. Over the past 17 years IEEE-1394 has been gaining traction as an aerospace and defense (A&D) high-speed interface and is used in programs such as the F-35 Lightning II, NPOESS, X47B, JSOW, and X2000, plus many others.

Much of IEEE-1394’s success came with the development of IEEE-1394b-2002, which specified several key features that when coupled with SAE Standard AS5643 created a deterministic, robust, and redundant system architecture that meets most A&D requirements for a hard real-time control bus. Technology suitability studies are common within the A&D industry for specific subsystems such as flight control, mission systems, and avionics to measure how technology meets stringent requirements; this document highlights several criteria often used to evaluate I/O technologies an how 1394 coupled with AS5643 meet them.

IEEE-1394 was first standardized in 1995. Major updates were completed in 2000 (IEEE-1394a-2000), 2002 (IEEE-1394b-2002), and in 2008 (IEEE-1394-2008). IEEE-1394-2008 Beta refined and extended IEEE-1394b-2002. It defines operation from S100 (98.304 Mb/s) to S3200 (3.932 Gb/s). Given this wide range of throughput options, 1394 is suitable for vehicle management and avionic and mission system networks including Electro-Optic/Infrared (EO/IR) sensor interfaces.

Deterministic behavior, excellent “robustness”
AS5643 coupled with IEEE-1394 Asynchronous Stream capability provides a programmable rate-based (time-sliced) protocol. The rate is determined by a control computer - also known as a Vehicle Management Computer (VMC) - generated Start of Frame (STOF) packet. Using pre-assigned offsets, each device can determine when to have data ready for transmission and also when to expect data from the bus. This allows for deterministic operation from the 1394 bus through each device and through the complete network.

Click on image to enlarge.

Figure 1: AS5643 Rate Based (TDMA-style) Deterministic Timing

In addition, AS5643 takes full advantage of IEEE-1394-2008 beta’s scrambled 8b10b encoding, which allows for transformer, capacitor, and optical isolation. Both transformer and fiber optic isolated systems have been tested to meet RTCA/DO-160 lightening susceptibility requirements.

Fault tolerance
AS5643 takes advantage of a 1394-2008 beta feature - looped topologies. 1394-2008 beta supports point-to-point, daisy chain, treed and multiple loop topologies. AS5643 recommends using loops to create a first level of topology fault tolerance, then defines a second level using double or even triple redundant networks. In addition to fault tolerance through the network architecture, 1394-defined header and data cyclic redundancy check (CRC) and AS5643-defined vertical parity check (VPC) provide bus level and application level error detection respectively.

Click on image to enlarge.

Figure 2: Triplex System Bus Architecture

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