Overlooking design-for-test can lead to costly PCB design rework

Faisal Ahmed, Nexlogic Technologies

June 02, 2014

Faisal Ahmed, Nexlogic TechnologiesJune 02, 2014

In the design phase of many printed circuit boards, the engineer is more interested in functional testing, making sure that the system he has developed meets the original specifications. Little thought may be given to incorporating features that allow visibility into the board to make sure it meets specs of the in-house manufacturing associates or the outside manufacturing company.

At the design and layout stage the assumption is often made that manufacturing will be flawless, allowing the development team to concentrate on functional tuning of the product. Unfortunately the test engineer at the manufacturing house is seldom given due consideration during design.

The result is that when manufacturing personnel test the assembly of that particular board, it is a difficult, if not impossible, task. The critical access or test points that would make the board more easily testable are not there. If DFT requirements had been considered, the probes of a flying probe tester would have incorporated the necessary contact points to make contact on the circuitry for measurement purposes, as shown in Figure 1.



Figure 1: DFT’s main objective is to provide contact points on circuitry for probes of flying probe tester.

By not giving assembly and manufacturing those critical access points, the result is low test coverage and, in worst cases, the board will go through manufacturing missing all the critical tests it needs, such as 30 percent test coverage when a typical PCB should be 70 to 80 percent accessible with testing probes. In the example shown in Figure 2, a high-frequency, high-speed board lacks the necessary extra test points or the possibility of making the pad sizes larger.



Figure 2: High-frequency, high-speed PCB lacks extra test points or possibility of creating larger pad sizes.

About eight hundred 0201-type passive components are at the center of this DFT issue. Table 1 shows land pattern sizes for the 0201 component in this particular design. The three columns, C, X, and Y, show IPC recommended sizes for the land pattern. As shown in the Y column, the 0201 component used on this particular board is almost half the size in the Y direction. Instead of being 0.6 millimeters (mm), it is 0.325 mm. The standard 0402-type package size is about half the size of the 0201 component itself.

At the PCB design stage, the 0201 pad was made smaller for signal integrity purposes. The test point and shape of the pad affect the impedance. If the pad is were thicker or bigger, then the impedance would be less. In this design, the 0201-type pad is made smaller to avoid impedance mismatch, and as a result, there is no additional area on the pad for test probes to hit.

Figure 3a shows the smaller pad sizes used for the 0201 in this design. There is no extra land area that can be used to probe the circuitry and measure this component’s values. However, there were vias covered completely with solder mask to prevent solder from flowing into the vias.



Figure 3a: Smaller pad sizes for 0201 passive components used to avoid impedance mismatch. But no pad area is left for test probes to hit and measure 0201's values.

To open up areas for test probes, certain after-the-fact design adjustments are necessary. Rather than covering the entire via with solder mask, a strip of the solder mask is left at the end of the component pad where the solder mask would originally be located. Then the remaining portion of that via pad is left open to allow the test probe to hit the exposed copper as shown in Figure 3b.


Figure 3b: Design adjustments made to open up test probe areas for 0201 passive components. Via pad is left open for test probe to hit exposed copper.

Changing the solder mask involves several steps. Normally, the solder mask is defined at the CAD level, and the fab shop building this board normally alters the solder mask per their requirements or to meet the industry specific standards for manufacturing the board. If they are sufficiently savvy about the fabrication process, PCB designers will specify the solder mask in their layouts. However, most often, the CAM (computer-aided manufacturing) technician or engineer defines the solder mask.

In this case, the fab shop’s requirement was to have a laser direct imaging (LDI) process since the tolerance involved in this solder mask change is minimal: at about +/-1 mil. Since the solder mask change was so very small, it was imperative to use LDI, and those changes are made at the CAM level to achieve the desired results.

In this case study, the solution was achieved without changing any electrical portions of the board and only involved minimal changes. By making changes to the solder mask, a considerable number of nodes were opened and coverage increased from 30 percent to 79 percent.


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