More effective power-integrity probing

November 03, 2016

Rajan Bedi-November 03, 2016

Increasingly, the space industry is using faster, higher-density FPGAs and broadband ADCs/DACs powered using lower and lower supply voltages generated by switching DC-DCs and POL regulators. Poor PCB layout, inadequate floor-planning, ineffective de-coupling, and weak filtering cause AC noise, interference, and transients on the power rails supplying these sensitive components.
Imagine the following scenario; your latest hardware has been delivered ready for commissioning and you have successfully powered up your shiny new board, started functional tests, and are seeing rail droop, ground bounce, power-supply-induced clock and data jitter, as well as in-band spurs in the ADC/DAC output spectrum. Why is all of this happening? How can you identify the root causes and how bad are they? How sensitive are the loads to AC noise and ripple on their power rails and what is their PSRR? How quiet must the supply voltages have to be to deliver the required performance?

Measuring small levels of AC noise on DC power rails using an oscilloscope can be problematic: first, the instrument and probe add further noise leading to confusion between measurement or power-supply-induced noise. The amount of offset may be limited preventing you zooming-in to view and analyse AC interference riding on top of the DC supply. Furthermore, the input impedance of the oscilloscope may load the power rail and its bandwidth may be limited, masking high-frequency switching transients. 

Given the increasing use of faster, higher-density FPGAs and broadband ADCs/DACs powered using lower supply voltages generated by switching regulators, together with bad design practices, engineers are requiring the ability to zoom-in on DC power rails to look for AC transients, noise, and ripple while they commission and debug their avionics hardware. An oscilloscope often does not have enough offset to be able to position a DC power rail in the centre of the screen for the required measurements. Placing a blocking capacitor in the signal path eliminates the offset problem but also masks important information, such as compression or low-frequency drift.

The latest, low-noise probes have good noise figure so they do not pollute the measurement of AC interference and ripple on a DC supply. An initial test is to short the inputs to verify that the probe and oscilloscope are suitable for the required measurement task. The plot below summarises the measurement of low-level AC noise on a DC rail and shows the reduction in baseline noise by using a power-integrity probe compared to a standard one.

Null measurement to characterise baseline noise. Click to enlarge.

Using probes (active or passive) that have a higher attenuation ratio than 1:1 can help with the offset difficulty but will also decrease SNR and negatively impact accuracy. Using an oscilloscope’s 50 Ω input can also load the DC supply being measured as shown below:

Difference in noise measurements due to attenuation ratio and termination

Dynamic loading of a DC supply by an FPGA or an ADC/DAC occurs at the clock frequency and can generate high-speed transients and noise on the power rails. Designers need high-bandwidth tools to evaluate and understand broadband interference on supply voltages. Switching noise can generate transient frequencies that can easily exceed 1 GHz.

Continue reading on Embedded's sister site, EDN: "8 tips for effective power-integrity probing."


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