Combining DSP & MCU operations in computationally complex time-critical calucations
This "Product How-To" article focuses how to use a certain product in an embedded system and is written by a company representative.
Although digital signal processing is ubiquitous it is not always visible, as with digital cameras and mobile phones. A growing amount of functions that are traditionally implemented using analogue circuits, are now contained in software on a microcontroller unit (MCU) or a digital signal processor (DSP), saving printed circuit board space and components and therefore lowering costs.
The drift and tolerances common to analogue devices can also be avoided. The advantages of an integrated DSP unit for these software algorithms are demonstrated by Fujitsu's MB91470/480 series of microcontrollers.
Many of today's filters and algorithms could hardly be implemented using analogue circuits, at least not without creating unjustifiable expense. Today developers have to decide whether to use an MCU, DSP or even both. Especially in applications where signal processing is only one task among others, this question is not always easy to answer. Controls and operating devices are classic to MCUs, whereas digital filters and regulators are typical of DSPs.
However, such a clear difference is not always so apparent with control units often resorting to digital filters in order to evaluate system states and carry out fast loops. Fujitsu recognised this as the case with motor control which is why it developed its MB91470/480 32bit MCU series with a powerful peripheral in the form of the µDSP alias MAC (multiply-accumulate) unit.
The µDSP has its own program and data memory enabling it to perform longer calculations as a coprocessor independent from the main processor (CPU), as shown in Figure 1 below. This allows the CPU to react quickly to interrupts also during filter calculation, a feature that is necessary to industrial control tasks, without changing the execution time for the filter.
 |
| Figure 1: Block diagram of µDSP |
The structure of the µDSP is optimised for multiply-accumulate instructions typical for digital filters and many other algorithms, which it carries out at full processor clock speed (up to 80MHz) in just one cycle. A 72bit wide accumulator adds up the values, with the number format selected from various 32bit fixed-point formats.
Especially for digital filters the µDSP is able to transfer input variables through filter stages without the assistance of the CPU. As long as the µDSP is idle, the CPU has full access to all configuration and memory addresses of the µDSP, so that data transfer to and from the CPU is possible. Once the calculations are started, a few status and control registers will remain accessible to indicate their operation status. When the µDSP has executed the program, it can generate an interrupt or trigger a DMA (direct memory access) transfer.
Modern drive trains need powerControlling a modern three-phase drive is one example of an application where numerous sub tasks need to be processed in fixed time intervals, which are determined by demands made on the system. Often, vector or field orientated controls are used, consisting of several coordinate transformations and cascaded control loops. Two current controllers form the innermost control loop and monitor the field- and torque-creating components of the stator current.
This control loop is often cycled at the full PWM (pulse width modulation) frequency, which can be many tens of kHz. The set point for the inner control loop is determined by a speed regulator, which controls the required torque and thus acceleration via the current. This is then pre-connected by a positioning control. Therefore, there are four control processes to be mastered in addition to the trigonometric transformations of the vector control and the application itself.
If the time intervals for such a control are taken into account, some of the sub tasks can be performed in parallel. For example, the time between scanning the actual current values and the next-possible update of the PWM register with the new target values is typically a PWM period.
As a result of parallel calculation by the CPU and µDSP additional functions can easily be implemented without increasing the effective CPU load. The execution of a typical PID algorithm by the MAC unit requires far less than a microsecond, which is why the µDSP can take on further duties such as filtering input signals between two PWM updates. Together with the MCU's flexible timers, very dynamic three-phase drives can be implemented.
The MB91480 series can even achieve this for two motors. In this case, the MAC unit can take over all six PID control loops of both motors (the position loops often have additional functionality such as anti-hunt etc., which are easier to implement on the CPU), so that the benefit, in terms of execution time becomes even more apparent.
Together with the flexible motor timer and ADC functionality of the MB91480 Series MCU, the timing for both motor controls can be optimised in a way that minimises interference of peripheral usage. To reach this, the PWMs for both motors are shifted against each other by approximately one-fourth PWM period. By this, the ADC units can be used to sample the phase currents of each motor simultaneously and synchronised to the PWM, giving each control a time-slot of its own to use the peripherals.
After all currents have been sampled, the µDSP is triggered and performs the PID calculations. Because of the short execution time, the control outputs are updated early enough before the first PWM needs the values, so that the PWM can be updated to the new output voltage with minimum delay. In other words, the response time of the first motor control is not influenced by adding a second; both can still be served with the full PWM frequency of 20kHz.
In order to map control loops efficiently on DSP-like structures, certain requirements must be fulfilled. First of all, most microcontrollers and DSPs are not equipped with a floating point unit, so fixed-point arithmetic is used instead. However, the structure of the regulator can also be optimised.
With some reforming, typical discrete PID regulators can be transferred to an IIR (infinite impulse response) filter-like structure. This implementation also avoids the summation of the integral term. It features a 'sum of products' form, typical to digital filters and for which the µDSP is optimised.
 |
| Figure 2: FIR8 filter |
In many applications it is necessary to evaluate analogue readings, but interference such as noise can prove a problem. This is often reduced with analogue low-pass filters, but can also be achieved digitally. Analogue anti-aliasing filters are necessary for nearly every AD transformation as a matter of principle, but digital filtering can flatten the requirements for the analogue pre-filters by over-sampling.
This utilises a greater sampling frequency than that which is necessary according to Nyquist's theorem (the minimum sampling rate required to avoid aliasing, which is equal to twice the highest signal frequency) in order to achieve the necessary bandwidth. As a result a simpler filter, with low edge steepness, can be used where the limitation to the target frequency range together with a reduction of the sampling rate is digital, thus avoiding extra circuit complexity.
Commonly used filters. The FIR (finite impulse response) or IIR are the most commonly used filters. FIR filters are non-recursive as there is no feedback of output to input. Therefore they are always stable, generating finitely long output signals. In contrast, IIR filters can resonate and become unstable, but often need fewer filter stages in order to achieve a specified behaviour. Because the µDSP carries out filter calculations on its own, an easy-to-use FIR filter can often be used without increasing the CPU load (Figure 2, above).
The 'moving average' filter is a typical simple FIR filter. It is commonly used as a simple low-pass filter providing smooth measured readings. All filter coefficients have the same value and are usually scaled (normalised) in such a way that the sum of the filter coefficients, representing the DC gain of the filter, equals unity. The µDSP of the MB91470 can calculate such a filter with 64 stages in approximately 1.2 microseconds. Therefore the full sampling rate of both 12bit ADCs in the MB91F479 can be used with this filter, or several shorter filters can be calculated at the same time.
Christian Harders is an Application Engineer in Industrial Marketing, Fujitsu Microelectronics Europe
Loading comments... Write a comment