A standard peripherals approach to adding flexibility to 32-bit MCU designs
3 V-to-5 V level shifting
Another common challenge in factory automation and industrial control applications is interfacing with legacy 5 V I/O systems. While a 5 V-tolerant I/O provides a means of receiving input from 5 V outputs, bidirectional communication requires the capability to drive 5 V logic levels. To address this problem, system designers are often forced to add external glue logic, such as external level shifters, increasing PCB layout complexity and BOM cost.
An integrated, versatile level shifting system can be achieved by enabling a 3 V I/O and a 5 V drive I/O that are directly interconnected on the same device, thus enabling a 3 to 5 V level shifting capability. This connectivity enables the developer to connect any output peripheral that does not already go to the 5 V drivers through an external wire that can be converted to a 5 V driver.
Figure 2 below provides an example in which a timer output that is typically in a 3 V domain can be level shifted by externally connecting the timer output to one input of the 3 V I/Os that are internally connected with the 5 V drive. The output of the corresponding 5 V drive output provides a 5 V timer output.
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Current-based communications using IDACs
Applications developed to support noisy environments, such as factory floors, face the major challenge of providing reliable communications in the presence of high noise levels. Typical communications interfaces, such as USART, SPI and I2C, have proven to offer some level of reliability. However, these applications are always pushed to their limits. One solution is to implement current-based communications using IDACs to enable communications protocols with high levels of noise immunity.
To implement this solution, the developer must use a current-mode IDAC. While a typical DAC provides a voltage output through a current output, an IDAC is controlled by a smart timer that can assist in generating the timing sequence for the communications protocol. In addition, a FIFO buffer on the IDAC can generate an interrupt after the FIFO has sent the last word of data, allowing the software to load the FIFO with the next packet of data to be sent, as shown in Figure 3 below.
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Input filter for noisy communications
In a typical industrial context, it is relatively common to find communication channels affected by noise. For example, a USART is a typical interface that can be impacted by a noisy environment and thus benefits from a comparator threshold filter used to filter noise from the receiver (RX) path.
To implement this system, it is necessary to use a comparator with an N-bit DAC acting as a voltage reference on the negative input. If the device containing this comparator is used in a noisy environment and it has to detect a noisy USART RX signal, the comparator can be used as an RX filter to remove the noise and avoid bad USART data.
The USART RX signal coming from the slave device will connect to the selected comparator positive input pin. The N-bit DAC can be used to threshold filter the RX signal, given prior knowledge of the noise in the system. The comparator’s asynchronous output is then sent from the device back into the actual USART RX input.
This input filter technique is not limited to a USART RX channel. The same technique can be used on any noisy input signal. Figure 4 below provides a flow diagram of the signal path to enable a filter mechanism for a UART implementation.
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