Things to keep in mind when designing power management circuitry

Travis Eichhorn

October 20, 2009

Travis Eichhorn

Heat dissipation
As an example of thermal considerations in power management circuitry, consider the LM3554 circuit . (Figure 2 below).

Figure 2: Shown is the LM3554 flash LED driver test circuit from National Semiconductor.

This device is an inductive boost converter designed for high-power flash LEDs used in cellphone applications. The LM3554 is a good test vehicle because it is a small device (1.6mm x 1.6mm x 0.6mm) and can provide up to 6W of output power (1.2A flash current into 5V LEDs).

Even with efficiencies around 85 percent, the relatively large output power capabilities and the tiny 16-bump SMD package make the device susceptible to high operating temperatures.

The primary effects of heat dissipation in the LM3554 are the increased on-resistance of device switches and change in device thresholds. In extreme cases where the temperature rises too high, the device could hit thermal shutdown and turn off.

Knowing an accurate RJ-A will help determine the device's junction temperature during the intended operating power, and ensure the circuit will reliably and predictably meet the application requirement.

In a likely scenario, the device can have an input voltage of 3.6V, an LED voltage of 3.6V and a LED current of 1.2A. In this situation, the converter boosts the output voltage to 300mV above V_IN. This provides the 300mV of headroom across the device's two paralleled current sources that regulate the LED current.

The total power drop across the device will be the sum of the power across the synchronous PFET, NFET and two current sources. The PFET and NFET power drops are across resistive components, so the RMS current must be used to get an accurate power estimation.

This current is just the RMS inductor current multiplied by the percentage of the switching period that the NFET and PFET are conducting. If we know the converter efficiency, the duty is given by 1 " D = (V_IN x efficiency) / V_OUT.

For our case, V_OUT = V_LED + 300mV and the efficiency is around 90 percent. This gives a PFET duty cycle (1 - D) of 83 percent and an NFET duty cycle of 17 percent. The RMS inductor current equation is:

Where delta x IL is the peak to peak inductor current that, for our case, is approximately 140mA, and ILDC is the average inductor current which given by I_LED/(1-D).

The total power loss in the switches becomes 45mW for the NFET (R_{DS_ON} = 125m-ohms) and 265mW for the PFET (R_{DS_ON}= 152m-ohms). Additionally, the current sources have a drop of 300mV x 1.2A = 360mW, giving a total internal power dissipation of 668mW.

The given R_J-A in the datasheet is 60°C/W and is taken from a 4- layer JEDEC test board detailed in JESD51-7. Using this RJ-A, the predicted junction temperature at TA = 50°C is 83.4°C. This would not be a problem for the device since it is below the thermal shutdown threshold of 150°C and below 125°C, the maximum operating junction temperature specified in the LM3554 datasheet.

In another scenario, the LM3554 can be set to output a constant +5V during the same flash pulse. The 300mV current source headroom now becomes 5V - 3.6V = 1.4V, resulting in a current source power dissipation of 1.68W.

Assuming the device is still 90 percent efficient in delivering 5V at 1.2A, the duty cycle is now 35.2 percent, making the DC inductor current 1.85A with delta IL of 288mA. The NFET dissipation is now 151mW and the PFET dissipation is 338mW. The total internal power dissipation of 2.169W gives an estimated die temperature (at TA = 50°C) of 180°C, which is 30°C above the thermal shutdown threshold and 55°C above the maximum operating junction temperature.

In reality, the device will not be mounted on a 4LJEDEC test board, but on a PCB with different routing of planes, other components close by that are dissipating power, and a different number of via's to lower layers. All these application variables, in addition to many other, drastically affect the R_J-A, which in turn reduces the accuracy of the junction temperature calculations.