Managing power in embedded applications using dual operating systems
Let’s take a look at the block diagram of a typical modern embedded system as shown in Figure 1 below. The processor is highly integrated and includes several types of processors and accelerators for application-specific needs as well as all the I/O peripherals to get the data in and out.
The system board has external voltage regulators for the different power rails in addition to battery and clock management support integrated circuits (ICs). It also contains external I/O modules and hot swappable devices.
To save energy, the application can take advantage of the internal memories by aligning code and data. In this way, algorithms in the pipeline can reuse buffers locally so that the I/O buffers at the pin level do not have to toggle needlessly.
Other techniques include matching data types to architecture, correct alignment and use power of two for array sizes to simplify address calculation. These techniques can help reduce power consumption because the lower MIPs required can lower the temperature. Some call this “energy coding,” the third optimization vector besides speed and code size.
Figure 1: Modern embedded system using complex SoC.
Power management is a concerted effort. Actions such as going into standby mode can involve a series of hardware and software steps. Therefore, to really “do the job right,” power management needs to be a system-level (i.e. where hardware meets software) design goal, especially if the processor is a complex SoC with multiple internal bus masters.
For example, for the “suspend” operation, the software has to take the hardware through the following actions:
1 - Notify drivers and pending tasks that the system is powering down
2 - Wait for the safe state to start the shutdown sequence
3 - Turn off I/Os and accelerators by gating power or clocks
4 - Save system state to memory (shown as mobile mDDR)
5 - Adjust voltage regulators to throttle down
6 - Set up battery management for suspend
7 - Transition clocking to a suspend state (usually involving just the real-time clock and mDDR running)
To get into the details of how power management is implemented, we now need to move our discussion on a real device and software.
Power management with Linux & DSP/BIOS on real hardware
On SoCs, there are often two on-chip processors: a general purpose processor (GPP) such as an ARM® core as well as a specialized core such as a digital signal processor (DSP) or graphics processing unit (GPU).
The ARM usually runs embedded Linux for I/O and graphical user interface tasks. A processor focused on signal processing needs a more deterministic and lightweight operating system such as the DSP/BIOS software kernel foundation to perform signal processing.
The chip is highly integrated with multiple I/O peripherals like Ethernet, USB, SATA, an LCD controller and more, as you can see in the following block diagram in Figure 2, below.
Each processor has equal access to the on-chip peripherals, enabling I/Os to be distributed between the two depending on system response time requirements.
For support of embedded systems requirements, the Linux kernel version 2.6 implements power management using a network of frameworks and drivers.
Figure 2: Power management implementation for embedded Linux
To help understand this, we just need to remind ourselves that there are key functions such as suspend, resume, idle, DVFS and the mechanism to achieve them involving controlling the central processing unit (CPU) (CPUIdle for CPU sleep states), the clocks (clock framework and tickless option), the voltage regulators (regulator framework) and the helper drivers (mainly I2C and SPI).
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