Thread synchronization techniques for better multicore system power/performance tradeoffs

Faheem Sheikh, Mentor Graphics

June 12, 2012

Faheem Sheikh, Mentor Graphics

Techniques to reduce RTOS overhead
The proposed scheme in Figure 1 below shows the nodes that represent a thread (either parent or child) while the branches indicate the fork-join operations. Each node is labeled by the priority level (except the last node labeled as E to indicate the end state).

Click on image to enlarge.

Children have one level higher with respect to the parent. Each child responds to a join call from the parent to indicate its completion. The proposed RTOS fork-join services involve the following steps in each system call:

Thread Fork
1. It is endured that the child thread to be forked has a priority one level higher than the parent thread.

2. Preemption of the parent thread is disabled until it finishes forking all children threads. (As soon as the parent enables preemption using an RTOS system call, all the cores will be occupied by the child threads, thus having maximum utilization).

3. The RTOS requests the hardware to set an architecture specific notification event visible to all the cores in the system.

Thread Join
1. When the parent is able to call the join API, this means that one of the child threads has ended its job.

2. The parent can then check the status of the thread by a simple read in its thread control block, make sure it shows an end status, and then return successfully.

On the other hand, if the parent checks the thread status and a state other than “end” is indicated, it means there are more parallel resources than the number of children left.

Otherwise, the parent would not have been able to run again and call join – so it can take a scheduler trip giving other tasks a chance to run. In case parent and children were the only load in the system, put the core on which the join call was made into a low power mode safely - in the knowledge that for now this core has nothing more to do.

Note that while dynamic voltage and frequency scaling (FVFS) is difficult to achieve on embedded multicore processors, almost all vendors support low power CPU modes, increasing the portability of the proposed solution.