Back to the future 2028
|November 2028 is the 40th anniversary of ESD. Click here read other 2028 lookbacks.|
Twenty years ago, the Programmable System-on-Chip (PSoC) was a new path for system design--a path that is now an industry standard for designing embedded systems. PSoC transformed embedded system design into a system-level abstraction, synergistically combining several major trends into an optimal embedded system design method.
Exploiting advanced process technologies, PSoC was the first IC with a complete embedded system on one chip; it included configurable analog blocks for signal conditioning and processing, programmable digital blocks for common peripheral functions, a processing subsystem, and a switched fabric that provided user- and application-specific connectivity and enabled the user to optimize the chip's pinout. With today's 8-nm technology, this seems like an obvious idea; but not so at PSoC's launch.
The configurability and programmability combined with the switched fabric's connectivity allowed truly distributed, operationally equivalent, functional blocks to be built on-chip. Blocks (such as analog-to-digital converters) could be constructed in several different, functionally identical ways, and unused resources could be used by other blocks instead of wasted. Not dedicating blocks to fixed functions not only improved efficiency, it enabled enhancing block functions and making parametric trade-offs (such as hardware vs. software, analog vs. digital, sampled vs. continuous time).
The switched fabric made several other things possible. It was run-time alterable so that the functionality of the chip could be changed on the fly, thus allowing time-multiplexing of resources. Its routing resources were scalable from full differential shielded analog routing (allowing greater than 110-dB signal-to-noise ratio) to small multiplexed routing shared throughout the chip; its routes and programmable connectivity allowed blocks to be built with resources used, where this made sense, from different parts of the chip. Intelligent subsystems could be made up of different resources.