Tips on building & debugging embedded designs: Part 1
When I was a young technician, my associates and I arrogantly believed we could build anything with enough 10k resistors and duct tape. Now it seems that even simple electronic toys use several million transistors encased in tiny SMT packages with hundreds of hairlike leads; no one talks about discrete components anymore.
Yet no matter how digital our embedded designs get, we can never avoid certain fundamental electrical properties of our circuits.
For example, somehow the digital age has an ever-increasing need for resistors—so many, in fact, that most “discrete” resistors are now usually implemented in a monolithic structure, like an SIP, not so different from the ICs they are tied to.
Too often we spend our time carefully analyzing the best way to use a modern miracle of integration only to casually select discrete components because they are, well, boring.
Who can get worked up over the lowly carbon resistor? You can’t even buy them one at a time any more. At Radio Shack they come paired in bright decorator packages for an outrageous sum.
Back when I was in the emulator business we dealt with a lot of user target systems that, because of poor resistor choices, drove the tools out of their minds.
Consider one typical example: a unit based on an 8-MHz 80188, memory and I/O all connected in a carefully thought-out manner. Power and ground distribution were well planned; noise levels were satisfyingly low. And yet, the only tool that seemed to work for debugging code was a logic analyzer. Every emulator the poor designer tested failed to run the code properly. Even a ROM emulator gave erratic results.
Though the emulator wouldn’t run the user’s code, it did show an immediate service of the non-maskable interrupt—which wasn’t used in the system.
(Note: When things get weird, always turn to your emulator’s trace feature, which will capture weirdness like no other tool.)
A little further investigation revealed that the NMI input (which is active high on the188) was tied low through a 47k resistor. Now, the system ran fine with a ROM and processor on the board.
I suppose the 47kpull-down was at least technically legitimate. A few microamps of leakage current out of the input pin through 47k yields a nice legal logic zero. Yet this 47k was too much resistance when any sort of tool was installed, because of the inevitable increase in leakage current.
Was the design correct because it violated none of Intel’s design specs? I maintain that the specs are just the starting point of good design practice. Never, ever, violate one. Never, ever, assume that simply meeting spec is adequate.
A design is correct only if it reliably satisfies all intended applications—including the first of all applications, debugging hardware and software. If something that is technically correct prevents proper debugging, then there is surely a problem.
Pull-down resistors are often a source of trouble. It’s practically impossible to pull down an LS input (leakage is so high the resistor value must be frighteningly low). Though CMOS inputs leak very little, you must be aware of every potential application of the circuit, including that of plugging tools in. The solution is to avoid pull-downs wherever possible.
In the case of a critical edge-triggered (read “really noise sensitive”) input such as NMI, you simply should never pull it low. Tie it to ground. Otherwise, switching noise may get coupled into the input. Even worse, every time you lay out the PC board, the magnitude of the noise problem can change as the tracks move around the board.
Be conservative in your designs, especially when a conservative approach has no downside. If any input must be zero all of the time, simply tie it to ground and never again worry about it. I think folks are so used to adding pull-ups all over their boards that they design in pull-downs through the force of habit.
Once in a while the logic may indeed need a pull-down to deal with unusual I/O bits. Try to come up with a better design.
(The only exception is when you plan to use automatic test equipment to diagnose board faults. ATE gear injects signals into each node, so you’ll often need to use a resistor pull-down in place of a ground. Use a small—really small, like 220ohms—value.)
Though pull-downs are always problematic, well-designed boards use plenty of pull-up resistors—some to bias unused inputs, others to deal with signals and busses that tristate, and some to put switches and other inputs into known one states.
The biggest problem with pull-ups is using values that are too low. A 100k pull-up will in fact bias that CMOS gate properly, but creates a circuit with terribly high impedance.
Why not change to 10k? You buy an order of magnitude improvement in impedance and noise immunity, yet typically use no additional current since the gate requires only microamps of bias.
Vcc from a decent power supply is essentially a low-impedance connection to ground. Connect a 100k pull-up to a CMOS gate and the input is 100k away from ground, power, and everything else—you can overcome a 100k resistance by touching the net with a finger. A 10k resistor will overpower any sort of leakage created by fingers, humidity, and other effects.
Besides, that low-impedance connection will maintain a proper state no matter what tools you use. In the case of NMI from the example above, the tools weakly pulled NMI high so they could run stand-alone (without the target); the 47k resistor was too high a value to overcome this slight amount of bias.
If you are pulling up a signal from off-board, by all means use a very low value of resistance. The pull-up can act as a termination as well as a provider of a logic one, but the characteristic impedance of any cable is usually on the order of hundreds of ohms.
A 100k pull-up is just too high to provide any sort of termination, leaving the input subject to cross coupling and noise from other sources. A 1k resistor will help eliminate transients and crosstalk.
Remember that you may not have a good idea what the capacitance of the wiring and other connections will be. A strong pull-up will reduce capacitive time constant effects.
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