A standards-based approach to capacitive-sensor EMC problems

J.D. van Wyk, M. Visser, and D.B. Rademeyer, Azoteq

April 4, 2012

J.D. van Wyk, M. Visser, and D.B. Rademeyer, Azoteq

Conducted Immunity
In a certain sense, the conducted immunity standard IEC 61000-4-6 is an extension of the radiated immunity standard IEC 61000-4-3. The conducting part of the title can be misleading, as the standard refers to interference that has been induced into cabling by radiated fields. It is not practical to test for radiated immunity at 150kHz to 80MHz, due to the size of the required antennas. At 30MHz, wavelength is 10m, so a half-wave dipole antenna would be 5m long! So interference is injected into cables as if it has been induced by radiated fields. The standard also allows testing up to 230MHz should the DUT and its cables have dimensions less than a quarter wavelength. Similarly, the lower frequency (150kHz) may be raised if the device is small enough. Normally, the specific product committee decides what frequencies pertain.

Injection of interference may be done via three alternatives, according IEC 61000-4-6. The first is via the use of so-called CDNs, or couple-decouple networks. One may also use an Electromagnetic Clamp, which is what the name implies. Or one may use what is known as Bulk Current Injection (BCI), which uses specific current clamps. A difference between the standard and real world threats is the fact that interference only gets injected into one cable at a time according to the standard. In reality, radiated interference couples simultaneously to all the cabling of a given application. Another gap in the standard is testing for common mode currents only, which may be addressed in future editions, as differential mode currents due to illuminating fields are quite possible.

In terms of the level of the conducted interference, the standard is ambiguous. The standard specifies leveling during setup for 1V, 3V, and 10V, all RMS values, into a 150 W load that is connected to the ground reference plane. However, no mention is made of the 80% amplitude modulation with a 1kHz sine wave carrier that the standard requires when actual immunity testing is done. So the exact level while testing is not known, since the cables impedance into a device is seldom 150 W. For more information, please refer to IEC 61000-4-6. To help ensure a pass for IEC 61000-4-6, most of the guidelines for radiated immunity hold. In addition, with the test being a common-mode test, sufficient grounded copper area, especially for the power supply section, is important. Typically, good filtering in the power supply will help attain immunity.

Electrical Fast Transient Burst (EFT/B)
The origin for EFT/B immunity requirements can be found in the basic circuit shown by Fig. 2, common to a large number of applications. Whenever a substantial current along an inductive path is interrupted by a mechanical switch, arcing and a burst of high voltage spikes are generated as the switch opens [2].



Such bursts of transients are especially prevalent in heavy industry and electrical switching installations. But even in a typical residential setting, something like a power drill will generate similar interference. To provide a common basis for EFT/B immunity testing, the IEC published 61000-4-4, which specifies approximately three bursts of transients per second, with each burst containing 75 transients. The transient pulse repetition frequency within a burst may be either 5kHz or 100kHz. According to the standard, the latter may be more representative of real world threats. However, traditionally 5kHz has been used, and it is up to the specific product committee to decide which will apply. Rise times of the transients are on the order of nanoseconds, implying frequencies of a few hundred MHz. Table 1 lists immunity levels for the common mode voltage applied between mains supply cables and the local earth plane as required by IEC 61000-4-4.


Click on image to enlarge.

For some applications, testing with coupling to auxiliary cables using a prescribed capacitive coupling cable clamp may be necessary. But for most capacitive sensing applications, only testing with coupling to mains cables is required. To understand how to guard against EFT/B, we have to investigate the paths of the mainly capacitive interference currents. This is discussed in depth by [2]. Following the below should improve overall EFT/B immunity:

• It is best to reflect the EFT/B energy back to the source using inductance, capacitance, or a combination of the two along with dissipative elements as early as possible, i.e. during the power supply input stages.
• A large ground plane in the power supply input stage helps to reflect EFT/B energy back to its source.
• Failing the above, care must be taken that sufficient grounded copper is provided in the capacitive sensing part of the design to channel the capacitive EFT/B interference currents. If not, these currents may flow via the capacitive sensing pads to the large ground plane underneath, causing havoc.
• Capacitive EFT/B interference currents will typically flow via the ESD protection diodes present on most capacitive sensing device pins.
• Blind application of RC and LC low-pass filters will not help. Careful analysis is necessary to ensure such filters are placed in interference current paths, due to the mainly common mode nature of EFT/B.
• If allowed by the sensitivity budget, increase series resistance to Cx pads to 10 kW (kilo-ohms).
• If allowed by the sensitivity budget, use hashed copper pours to fill pads of Cx electrodes in surface capacitance applications.
• Long, thin tracks to Cx electrodes may improve EFT/B immunity but will reduce Radiated Immunity.
• Additional discrete ESD diodes external to the capacitive sensing device may assist to improve EFT/B immunity as a part of interference currents that may then flow external to the IC.

Electrostatic Discharge (ESD)
IC’s are inherently susceptible to ESD damage, either occurring during the process of assembling them onto boards, packaging, or in the field. Currently, several methods exist to rate IC (not application or system) immunity to ESD, the most common being:

• HBM (Human Body Model) - Simulates a person being charged and then discharging from a bare finger to ground via the circuit under test.
• MM (Machine Model) - Simulates a charged manufacturing machine discharging via the device to ground.
• CDM (Charged Device Model) - Simulates an integrated circuit becoming charged and discharging to a grounded metal surface.

The HBM is sufficient for a controlled ESD environment such as an assembly floor, but is completely inadequate for application or system level testing, where ESD levels, both voltages and currents, can be much greater. Therefore, a different standard, IEC61000-4-2, is used by industry for systems and applications. HBM and IEC61000-4-2 are different standards designed for different purposes. Several differences between the HBM and IEC61000-4-2 standards are immediately obvious:

• The amount of current and I2R power released during a voltage strike, for instance the peak current discharged during an 10KV HBM strike, is less than the peak current discharged during a 2KV IEC61000-4-2 strike. The difference in current is critical to whether the DUT will survive the ESD strike, as high current levels can cause junction failures and metallization traces to melt.
• The rise time of the voltage strike. The HBM model specifies a rise time of 25nS. An IEC pulse has a rise time of less than 1 nS and dissipates most of its energy in the first 30nS. If protection circuitry takes 25nS to respond, the device rated using the HBM specification will be destroyed.
• The number of voltage strikes repeated in the tests. HBM requires 3 positive and 3 negative strikes to be discharged on each pin specified in the test. IEC61000-4-2 requires 10 positive and 10 negative strikes.

ESD Protection Methods
Series Rx: Capacitive sense electrodes are usually exposed. Placing a series resistor (RX) between the sense IC and electrode (CX) can improve system ESD immunity. This limits peak currents and helps dissipate some of the power. Capacitive sensing solutions are available with sufficient SNR that up to 10kW (kilo-ohms) series resistance can be tolerated. Taking dimensions and air breakdown into consideration, it is advised that multiple 0603 or 1206 components are used for protection above 4.6kV.

Overlays: These isolate the capacitive sensing electrode pad from the user and generally increase the robustness of a design, enabling the design to withstand higher levels of ESD. Typical overlay materials include Perspex/Plexi-glass (17.7kV/mm breakdown), standard window glass (7.8kV/mm breakdown), and other plastic / non-conductive materials.

TVS diodes: TVS diodes have been successfully integrated into projects assisted by the authors. These are typically only required if ESD strikes are able to directly penetrate the Cx electrode pins on the sensing device. This can occur if sense antennas or shield wires are exposed, if the ESD strike bends around an overlay, or if there are defects in the overlay. Implementing TVS diodes may influence the sensitivity of the design, as this establishes a parasitic capacitance on the Cx pin. The influence on sensitivity by a known capacitance will differ in every design. It is recommended that when using TVS diodes, selecting a component with the lowest possible capacitance value is necessary

System designers need to be familiar with the differences between various ESD test standards. For system level ESD ratings, always use the IEC61000-4-2 standard. Most ESD ratings found on the datasheets of capacitive sensing ICs are HBM ratings and most ICs are rated at 2KV-4kKV HBM. Refer to [5] for further guidelines on ESD.

References
[1] Azoteq – www.azoteq.com
[2] Azoteq Application Note AZD051* – “ Electrical Fast Transient Burst Guidelines”
[3] Azoteq Application Note AZD015* – “Radiated Immunity Guidelines for ProxSense Designs”
[4] Amplifier Research Application Note #43 – “Test beyond the specs”
[5] Azoteq Application Note AZD013* – ESD Guidelines
[6] Azoteq Application Note AZD008* – Overlay Guidelines
[7] Tim Williams, Keith Armstrong, EMC Testing, 7 Part Series

* Azoteq Applications Notes can be downloaded at http://www.azoteq.com/proximity-switches-design/touch-capacitive-application.html.

Daniel van Wyk rejoined Azoteq in 2010 as senior application and development engineer. His duties include EMC, application support, research and development and intellectual property assistance. Dr. van Wyk started his career at Azoteq in 2003 as a development engineer, followed by position as development and antenna design engineer at Sygade Solutions, later MaxID, and then as Hardware Design engineer at Itron South Africa, with specific focus on metering platforms and RF solutions. Dr. van Wyk holds Bachelors, Masters (cum laude) and Doctorate degrees in Electrical and Electronic Engineering, all from the Rand Afrikaans University in Johannesburg, South Africa.

Melville Visser joined Azoteq in 2009. He is responsible for all ESD testing, and collaborates narrowly with the IC Design team. This is apart from his other EMC duties, encompassing most EMC fields, as well as life-time and failure analysis testing on IC’s and complete product assemblies. Previously Mr. Visser worked for PDNA Consulting Engineers in Cape Town where he did electrical design layouts for industrial and civil industries. Mr. Visser holds a Bachelors degree in Psychology and Marketing from the University of the North West, a National Diploma in Electronic Engineering from the Cape Peninsula University of Technology and is currently busy with his Degree in Electronic Engineering through UNISA.

Danie Rademeyer joined Azoteq from One Digital Media where he was the Research and Development Director. He currently manages the applications group at the Paarl Development Centre. Previously Mr. Rademeyer worked at Barrows as a design engineer and was responsible for the development and implementation of a low power RF based mesh network for retail applications. He was an integral part of the development of this platform into a new business venture, One Digital Media, and of its growth into one of the biggest retail digital media networks in the world. Before One Digital Media Mr. Rademeyer worked at Telkom, Securicor and Skye Advanced Technologies. Mr. Rademeyer holds a Bachelors degree in Electronic Engineering from the University of Pretoria.