Finding low-temperature IC problems with low-voltage tests
At the beginning of any chip design, engineers rarely discuss reliability and operation at the extremes of the device's temperature range. If parts have not been properly characterized, failures can occur once the devices go into high-volume production. Your customers will start to see problem devices and RMAs (return material authorizations) will commence. Here's how we can now screen NVM (Non-Volatile Memory) failures that only occurred at subfreezing temperatures. We'll explain how to use low power-supply voltages to temperature screen devices for cold temperatures, which lets us test at room temperature.
During production of a device that had NVM (non-volatile memory) installed, we discovered an issue where a few ppm (parts per million) of the devices were failing memory retrieval at temperatures around -40°C. As this was an automotive device, reliability was a prime concern.
In production, these devices were originally tested at the minimum supply voltage (2.2 V) and there were a few ppm of fallout at 35°C. Because we had an automotive IC, we had to screen the devices and prevent bad ones from getting into the field.
Clearly, the initial step was to introduce a minus temperature screen for this product. The result was immediate success at identifying the problem parts. Figure 1 shows failed devices at -40°C.
Figure 1. Some devices failed when tested at -40°C.
After running a few lots, the customer reported a significant issue relating to percentage failures of parts on their line. After running some experiments, we found by dropping the voltage to 2.0 V, we could find a process issue that was being missed at 35°C. The reticle issue is illustrated in Figure 2.
Figure 2. The red dots show OTP failures at 35°C at 2 V.
We discovered that the reduction in voltage seemed to stress the part and cause a failure that normally wouldn't be seen at room temperature, but becomes apparent at low temperatures. The question then became, "Why?"
In this case, production ran quite well with no major issues except that operations now had the issue that yield was low for some lots. See Figure 3 for an example of a low yielding wafer.
Figure 3. A low-yielding wafer has many failed devices, shown in red.
We were then faced with a tradeoff between yield and reliability. But, how could we prove which is correct? In this example, we have proven flow at minus temperature where we have caught failing devices. So, we can do a full characterization with different voltages to see which will capture the most failures with the least amount of escapes, hence correlating to the minus temperature screen.
Continue reading on Embedded's sister site, EDN: "Low-voltage tests uncover low-temperature IC problems."