Design Con 2015

Is nonvolatile MRAM right for your consumer embedded device application?

Tom Lee, Freescale Semiconductor

February 17, 2007

Tom Lee, Freescale SemiconductorFebruary 17, 2007

Magnetoresistive RAM (MRAM)is a non-volatile memory technology that retains memory content for at least 10 years without requiring power. It is suitable for commercial applications that require saving data during a system crash. MRAM-based devices can offer a solution for "black-box" applications, as it writes data at SRAM speeds while retaining data before total power loss occurs.

MRAM is also suited for entertainment applications with resume-play features. During power down, bookmarks that indicate the timestamp of the media played are quickly stored on the non-volatile MRAM. Then, a subsequ ent po wer up and resume play is performed almost instantaneously (Figure 1, below).

Figure 1: During power down, bookmarks are stored in MRAM to allow media resume-play application.

Security systems can also benefit from MRAM by managing encryption. Encryption parameters can be stored quickly and retained during system shutdown. This also goes for gaming machines that require fast data-parameter storage and data integrity during a power loss.

MRAM versus other universal memory options
Compared to other memory technology options, MRAM has distinct advantages (Table 1, below).

Table 1. MRAM offers comparative advantages over other memory technologies.

The following list discusses the characteristics of other options:

Flash.This technology uses a charge stored on a piece of floating polysilicon (floating gate) laid over a gate oxide. Programming a flash bit cell requires a high voltage field that accelerates electrons fast enough to overcome the energy barrier of the oxide between the silicon and the floating gate.

This causes the electrons to punch through the oxide and charge the floating gate, which alters the threshold voltage of the bit-cell transistor. Repeated transfers of electrons through the oxide gradually wears out the oxide material, thus flash is limited to 10K-1M write cycles before the bit is no longer functional.

Continuous writes can wear out some flash memories in 10 days. Meanwhile, MRAM can endure infinite write cycles because no charging or discharging is involved. Magnetic polarities are rotated during programming, which is a non-destructive and nondegrading operation.

During programming, flash needs high voltage to draw electrons through the oxide material. MRAM uses current that creates a magnetic field to program the free layer. Furthermore, flash performs a program or erase operation on a large block of the memory array. MRAM perform writes on individual addresses.

SRAM. Using active transistors that hold CMOS logic level, SRAM requires power to retain memory contents. MRAM memory contents are held in the polarity of its free magnetic layer. Since it is magnetic, this layer retains its state even without power.

As technology continues to shrink SRAM cells, the smaller geometry devices tend to leak more. This leakage is small for individual cells, but becomes significant when multiplied by millions of cells in a memory device. This effect is expected to remain as technologies shrink. Given MRAM's non-volatility, powerdown techniques can be used in the system for zero current leakage.

Battery-backed SRAM. This consists of an SRAM unit and an accompanying battery in the same package. This nonvolatile memory uses battery power to retain memory contents. Meanwhile, MRAM does not require a battery for data retention and performs read/ write at a speed faster than battery-backed SRAM. This improves reliability and dismisses environmental issues linked with battery disposal.

EEPROM. This standalone memory has much slower programming speeds compared with MRAM, and limited write-cycling capability.

NVSRAM. Also known as non-volatile SRAM, this combines SRAM and EEPROM features. It stores data from SRAM to EEPROM during power loss. However, the data transfer is very slow and requires a large external capacitor to hold power on the NVSRAM during data transfer. MRAM offers faster writes so that data can be written during normal system operation.

Thus, minimum data transfer is necessary during power loss. Applications using MRAM also benefit by safely writing to the memory without using large external capacitors.

FRAM. Another non-volatile RAM, Ferroelectric RAM (FRAM) has typical small array sizes ranging from 4Kbit to 1Mbit. The array sizes are small because this technology has limited scalability to further shrink the bit-cell size.

Without such scalability limitations, MRAM can offer larger memory arrays. Moreover, MRAM can be programmed faster than FRAM. Some FRAMs have limited cycling capability (e.g. 10 billion cycles). They also require a refresh of the memory after a read because the operation destroys the contents of the bit cell being read.

DRAM. With this technology, memory has to be frequently refreshed to retain data.

Figure 2. MR2A16A has an asynchronous design with standard chip-enable, write-enable and output-enable pins to provide flexible data bus control.

Key features
After over eight years of MRAM R&D, the MR2A16A is the first 4Mbit MRAM commercial device. The device is arranged in a 256K x 16bit configuration (Figure 2, above) and has an asynchronous design with standard chip-, write- and output-enable pins.

Such a design allows system flexibility and prevents bus contention. Separate byte-enable pins also provide flexible data bus control in which data can be written and read as 8bits or 16bits.

It is fabricated using 0.18 micron process technology along with a proprietary MRAM process technology to create the bit cell. Five layers of interconnect are formed from both technologies.

The device runs on a 3.3V supply and has symmetrical high speed read/write access times of 35ns. It also offers fully static operations.

Packaged in 44-pin TSOP type- II, the device is configured with industry-standard center power and ground SRAM pinout. It can be used in existing hardware using the same SRAM configuration in its application.

The device has toggle bit cells that contain one transistor and one magnetic tunnel junction (MTJ). At the core of the MRAM bit cell, MTJ is placed between two magnetic layers, each with associated polarities. The top layer is called the free layer because it has freedom to flip polarity, while the bottom layer is called fixed layer because it has locked polarity.

Figure 3. Aligned polarity on MTJ results in low resistance.

Polarity of the free layer through the MTJ determines if a bit is programmed as "0" or "1" state. Aligned polarity on both magnetic layers results in low resistance through the MTJ stack (Figure 3, above).

On the other hand, opposed polarity on the two layers results in high resistance through the MTJ stack (Figure 4, below). This low and high resistance through the MTJ stack determines if a bit is read as "0" or "1".

Figure 4. Opposed polarity on MTJ results in high resistance.

During programming, the free layer's polarity is toggled to one of two directions. Polarity is set with copper interconnects running in perpendicular directions on the top and bottom of the MTJ.

Current across the perpendicular interconnects creates a magnetic field that toggles the polarity of the free layer toward the opposite direction ( Figure 5, below).

One major drawback to producing MRAM as a reliable memory is its high bit-disturb rate. When programming the target bit, the free layer in an untargeted bit can be programmed inadvertently.

Figure 5. Current across perpendicular interconnects creates a magnetic field that toggles polarity toward the opposite direction.

In the MR2A16A, toggle bit cells were created to rotate the magnetic moment in the same direction each time the bit state is flipped. A staggered pulse of current on write line 1 and write line 2 rotates the polarity without disturbing bits along the same row or column as the target bit.

To further prevent untargeted bits from being disturbed, copper interconnects were surrounded with a layer of cladding on three sides of the copper. This cladding directs and focuses magnetic field strength toward the target bit cell. This programs the target bits using lower current then isolates neighboring bits from the magnetic field that normally induces a disturb.

A bit endurance cycling study was done on MR2A16A to determine the device's endurance limit and negative effects on the soft error rate (SER) with repeated memory use. The devices were run at 4MHz (250ns) and 90°C.

Cycling stress, functional testing and SER data gathering were run under worst operating conditions for voltage and temperature. Units in the study endured 58 trillion (5.8E13) cycles without failure - thus, the MR2A16A has infinite write-cycling capability. Meanwhile, studies are being undertaken to gather all possible empirical data for write-cycling of the bit cell.

Road ahead
MRAM's next step covers automotive applications. For crash recorders, MRAM can gather and store more data during accidents and help determine causes of vehicular accidents or malfunctions.

Automotive applications using sensors can benefit from MRAM. Since sensors write data continuously, flash memories have difficulty keeping up with such data flow. New airbag systems also have sensors to detect and record passenger weight, interactions with other safety devices on the vehicle and the impact of collision.

Other automotive systems such as odometers, tire pressure log and ABS require frequent writes to memory that easily exceed the write-erase capabilities of flash and wear out its memory. MRAM's unlimited write-cycling capability ensures a more reliable system for mission-critical devices such as airbags and ABS.

The use of MRAM in the military is also gaining wide acceptance. Many systems use batterybacked SRAM and have inherent reliability issues with battery use. Honeywell has licensed Freescale's MRAM technology for its military and aerospace applications.

Further MRAM technology improvements can radically change embedded systems architecture. MRAM has the potential to replace RAM and flash memory used in embedded MCUs for data storage and program memory, respectively. MRAM is expected to replace both and allow singlememory architectures. MCUs have chip-specific ROM codes that MRAM can replace to provide fast field-programmable upgrades.

With much larger systems, microprocessors use RAM memory for fast read/write capabilities. DRAM serves as a temporary storage area for chunks of the application program. A hard drive stores non-volatile information for application software and data, but it is slow to read and write. Once MRAM replaces all these storage devices, instant boot-up PCs will be possible.

Currently, no universal memory exists. All memories have tradeoffs in write-cycling endurance, read/write speeds, data retention, array density, power use and price. Available memories on the market have inherent limitations that prevent them from offering the best memory features. However, with further refinement, MRAM could someday be hailed as the universal memory.

Tom Lee is Lead MRAM Product Engineer in the Transportation and Standard Products Group at Freescale Semiconductor.

Loading comments...

Most Commented

  • Currently no items

Parts Search Datasheets.com

KNOWLEDGE CENTER