Exploring Multicore Power Management with Modeling and Simulation
This "Product How-To" article focuses how to use a certain product in an embedded system and is written by a company representative.
Power management has often used the speed/power ratio metric (Mhz per Watt) as a measure of performance/power efficiency. If one processor had a higher Mhz per Watt rating over another, then presumably it would be more power miserly. Within a processor family this may be true, the ratings will reflect the underlying process technology and chip architecture.
However, newer microprocessors can vary in the number of cores, the number of instructions per clock cycle, and numerous hardware accelerators that can vary the performance for a given clock rate.
This means the speed/power ratio only has significance if the microprocessors have similar architectures in terms of number of cores, instructions per cycle, and degree of hardware accelerators.
If one wants to compare a single core processor from one vendor with a dual core processor from another vendor, then Mhz per Watt may be a misleading comparison of performance/power efficiency.
Mirabilis Design’s VisualSim software simulates SoC, boards, software, processors, and networked distributed system using models that are developed quickly using pre-built, parameterized modeling libraries in a graphical environment. These models contain power information embedded in them and can be used to estimate different power metrics.
Why Modeling and Simulation
Modeling and Simulation using VisualSim allows one to model both power and delays for executing software tasks to improve overall accuracy, as compared to a simple ratio metric.
Modeling and simulation can improve on the simple speed/power ratio comparison by taking into account valuable hardware information for a variety of configurations:
* Number and speed of processor cores
* Number and speed of busses
* Speed of caches
* Instructions per cycle
* Hardware accelerators
VisualSim provides extensive libraries for modeling hardware and software systems. These modeling components have power states and analysis built into the components. Combined with the application templates, power modeling is quick and provides a wide degree of coverage. The libraries are fully support TLM abstraction levels.
In addition, power management modeling can alter the power states, power levels as a simulation executes. More importantly, users can modify the central power algorithm to optimize power use further.
On the software side, modeling and simulation can characterize software that has not been fully developed early in the design cycle by estimating the number of cycles for key tasks. If the software exists, then a profile of executing tasks becomes the input.
Modeling with VisualSim provides extensive flexibility that is not otherwise available in more accurate modeling environments or using cycle-accurate models. This is because the models are built out of basic blocks and the user can modify the internal details of the component. Also, components are graphically built and can be easily handed off to others.
The components are connected to describe a proposed system and simulated for different operating conditions such as traffic, user activity, and operating environment. A variety of power metrics are generated from the model automatically including instant, average and peak power; and battery discharge.
In addition, the modeler can control the power levels, power states and battery charge through the use of RegEx functions available in the system.
Task/Power Efficiency Metric
Modeling and simulation allows one to compare any power management scheme to a baseline system that has all devices in the D0 (full-on) state and uPs is in the C0 (active) state.
In other words, the baseline system has little or no power management features. If one calculates a power efficiency metric it can simply be the ratio of power consumed by a baseline power system to a power optimized system:
Power Efficiency = Power_Baseline_System / Power_Optimized_System
The higher the ratio, the better the power management of the system. The issue with this simple metric is that it does not directly take into account how long the power optimized system may take to complete a set of software tasks. If one also calculates a task efficiency metric based on the time to complete a set of tasks:
Task Efficiency = Task_Time_Baseline / Task_Time_System
The task efficiency will be reduced for multi-core designs due to the communication time between parallel execution cores, for example. Typically, the power efficiency will be greater than one, while the task efficiency will be less than one. The overall Task/Power Efficiency metric combines the two individual metrics:
Task/Power Efficiency = Task_Efficiency * Power_Efficiency
The task/power efficiency metric now takes into account both power efficiency of the system and the time it takes to execute a set of application tasks.