Expanding emulation’s reach with virtual devices

Jim Kenney, Mentor Graphics

June 03, 2012

Jim Kenney, Mentor GraphicsJune 03, 2012

In this Product How-to design article, Jim Kenney discusses the increasing importance of virtual device emulation in hardware/software co-design, using a Veloce customer’s experience with the Mentor Graphics VirtuaLAB’s ability to generate Ethernet traffic that exercises an edge router chip.

With the majority of designs today containing one or more embedded processors, the verification landscape is transforming as more companies grapple with the limitations of traditional verification tools. Comprehensive verification of multi-core SoCs cannot be accomplished without including the software that will run on the hardware.

The increasing prevalence of complex, multifunctional, networked devices and the rising importance of embedded software create a need for faster simulation run times and full system verification early in the design cycle (Figure 1, below). Hardware-assisted verification, or emulation, delivers the required capacity and performance for extremely fast, full SoC testing—hardware and software. However, for many, a prosaic barrier to the benefits of emulation has proven both stubborn and persistent. The high-cost of emulators has made them affordable only for companies with deep pockets.


Click on image to enlarge.

Figure 1. With software driving most functionality, embedded software execution is mandatory for comprehensive SoC verification.

Fortunately, recently introduced virtualization technologies promise to open a door in this wall. By spreading the usability and cost of emulators across many simultaneous users, virtual peripheral devices will make emulators a more common fixture at small and medium sized companies, as well as larger ones.

The reasons for this begin with the fact that a device driver cannot be run against an SoC and fully tested unless the device driver has a device to talk to. As those devices are outside of the SoC, they need to be connected to it in order to be tested. Therefore, full SoC verification of hardware and software requires connecting the chip to its end environment, including all of the peripheral devices; such as USB, Ethernet, displays, hard drives, and PCI Express. Typically, this has been done with physical hardware and speed bridges or speed adapters.

In emulation, this has been done using “in circuit emulation” (ICE), where physical devices are cabled to a speed adapter, which are in turn cabled into the emulator. This setup consumes expensive lab space and takes time to configure and debug.

With all the cables and external hardware, it is the least reliable part of the emulation environment. And it’s difficult to debug if something goes wrong. These physical peripheral setups are not only inflexible but also costly to replicate. Each supports only a single user, locking the machine down to a given project or a single SoC. Emulators cost so much money that they need to support many users; yet ICE limits multi-user flexibility.

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