Reconfigure factory machine controllers for higher efficiency operation

Greg Crouch

October 06, 2009

Greg CrouchOctober 06, 2009

This "Product How-To" article focuses how to use a certain product in an embedded system and is written by a company representative.

Facing increased regulation and the need to reduce factory operating costs, machine builders are looking for solutions to boost product power efficiencies. Along with HVAC systems, the top consumers of electricity in a factory are water heating, lighting, office equipment and especially machinery.

More specifically, the motors within these factory machines are responsible for approximately two-thirds of the total electrical energy consumption in a typical industrial facility. Motors are everywhere— in blowers, pumps, compressors, conveyors, machine tools, mixers, shredders and more.

One way to get the maximum efficiency from the motors that control machinery is to employ more efficient and sophisticated field-oriented control to optimize their efficiency.

To this end, our team at National Instruments used Xilinx FPGAs as the basis for a common hardware architecture called reconfigurable I/O (RIO) to create a flexible embedded controller with high computing performance. Our machine-builder customers use RIO as a platform from which to draw field-oriented control (FOC) techniques that improve motor efficiency.

This RIO architecture is now deployed in many systems, such as those from EUROelectronics, Srl. The architecture helped EUROelectronics advance from the prototyping phase to the final machine setup in only three months (Figure 1 below).

Figure 1: Embedded-machine builder EUROelectronics reduced power use with FPGA-based field-oriented control.

Reduced Machine Design Time
U.S. Department of Energy data informs machine builders that switching to a motor with a 4 to 6 percent higher efficiency rating can pay for itself in just two years if that motor is in operation for more than 4,000hrs a year. Unfortunately, many machines host motors that are very large and too costly to replace. So in these cases, the key to reaping savings lies in updated drive control algorithms and controller hardware.

A second challenge is the integrated control complexities required for brushless DC and permanent- magnet synchronous AC motors (PMSM), both commonly grouped together as brushless DC motors (BLDC).

Many machine builders lack the software or hardware design expertise required to build an embedded controller that can execute real-time closedloop control on a wide variety of analog and digital sensor types. backplanes, combined with PowerPC 603e-based processors in various performance frequencies (Figure 2, below).

Figure 2: Modular RIO architecture-based framework for NI's single-board RIO and CompactRIO configurations.

We built into our RIO framework configuration software utilities and dynamic I/O reconfiguration capabilities that save time in setup and reuse for both the end-application programmer and the digital design engineer.

Our configuration software automatically detects custom hardware installed in the system. Integrated diagnostic tests of I/O peripherals ensure that I/O devices function properly. The designer connects the custom circuitry directly to the Xilinx FPGA and can design logic with the Xilinx tools or the NI LabVIEW FPGA Module.

Planning for dynamic configuration helps the machine builder design for hardware reuse. At the same time, it provides the ability to begin high-level application coding before the final new I/O circuitry design is complete.

It can be problematic if driver software and the associated APIs do not execute properly or return device-specific errors without the I/O circuitry installed. To get around this problem, software developers often create simulation subroutines that temporarily replace the I/O circuit code within the application.

This method makes it difficult to get a start on the application development and virtually impossible to debug the code. Our RIO middleware driver architecture includes functionality to integrate simulation code directly into the functional driver, thus simplifying code reuse and debugging. For example, Figure 3 below describes the embedded middleware software design hierarchy.

Figure 3: With processor middleware drivers, machine builders can focus on custom circuitry design. They can link to the programmable Xilinx FPGAs through standard header connectors.

These middleware drivers and system services have proven their mettle in thousands of deployed machine-builder applications. Parallel and multithread-safe embedded-middleware drivers are an integral part of RIO.

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