Developing and building systems using OpenVPX Profiles

Ken Grob, Elma Electronic Inc.

January 30, 2012

Ken Grob, Elma Electronic Inc.

By way of review, OpenVPX slots (Figure 3 below) are defined as Payload (PAY), Peripheral (PER), Switch (SWH), Storage (STO) and Bridge (BRG). Backplane topologies are identified as Central, or Star (CEN), Distributed, or Mesh (DIS) and Hybrid—VME & VPX (HYB).


Click on image to enlarge.

Figure 3. Module profile description of OpenVPX board

Typically, the system designer breaks an application down into functional elements, and identifies functional blocks such as SBC, Switch and I/O boards. These boards or modules will then be uniquely connected through a backplane, defined by a Backplane Profile that describes the interconnect.

At this point, it should be mentioned that the developer typically requires a standard development chassis to plug in boards for system development. At a minimum, OpenVPX and the existing defined profiles are identified to do exactly this; provide a backplane topology suitable to support initial system development.

What should be made clear is that the development profiles specified by OpenVPX may not provide the topology necessary to implement the user’s end architecture.

The end architecture may require a “yet to be defined” interconnect at the backplane level; existing module and slot profiles are likely suitable, but the end backplane interconnect may require tailoring.

OpenVPX provides a language to describe the modules and slots, and provides a way to draw and describe a tailored backplane. Here, the end application profile can be described as a Target Application Profile (TAP), the one that will ultimately be needed by the end application.

Where the TAP may use standard slot and module profiles, the backplane profile will end up being specific. This has been anticipated by the OpenVPX standard.

In certain cases, it may be desired to apply for a new backplane profile to be added to the standard. The VITA standards body has made provisions for new profiles to be considered for addition to the standard, however it is not required.

In identifying a backplane that is appropriate, review the topologies described by 6U module profiles and 6U backplane profiles in the specification that will identify the architectures that are available. 3U tables are also in the spec.

Manufacturers will tend to point the user to a reference development system, or specify module profiles that can assist in identifying a suitable development chassis with an appropriate backplane. The steps that should be follow in defining a system include the following:

1) Define the architecture
          a) Determine the backplane topology for the data flow and application (Central Switched,     Star, Distributed or Full Mesh, etc.).
          b) Determine if a standard backplane profile exists for the application—Don’t worry if it does not; this will be common.

2) Choose the slot profiles required for the I/O and your boards

     a) Pick the slot profile that defines and maps the I/O that you need—choices include Payload, Switch, Peripheral, Bridge and Storage.
     b) This process may be repetitive; there are over 30 slot profiles.

3) Obtain the module profiles for your boards
     a) The module profile specifies the ports and protocols.Examples:
           i) Two ports of PCIe x 4 (2F = 2 Fat Pipes).
          ii) Two ports of 1000-Base-T Ethernet (2T = 2 Thin Pipes).

4) Associate module profiles with the slot profiles
      a) More than one module profile can be used with a slot profile.
      b) Slot profiles are protocol agnostic.
      c) A board may comply with many module profiles.

5) This process can be repetitive – it can start with the boards or the architecture.

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