Seven ways to avoid embedded PCB engineering change ordersEngineering change orders (ECOs) drive up design costs and result in numerous delays in product development that in turn result in costly extension of time to market. However, most ECOs can be avoided by paying careful attention to seven critical areas where problems frequently occur: component selection, memory, moisture sensitivity levels (MSL), design for test (DFT), cooling methodologies, heat sinks, and coefficient of thermal expansion (CTE).
A meticulous review of all a component’s specifications is crucial to avoid ECOs. Initially the PCB designer may routinely check out electrical and engineering data as well as end of life and availability. But when a component is in the early stages of market introduction, all the critical specifications may not yet be available on the data sheet. The reliability data currently available may not be extensive or sufficiently detailed when the component has been on the market for only a few months or is available only in small sample quantities. Consequently, there may not be a sufficient amount of reliability and quality assurance data on field failures, for example.
It’s important not to accept the spec sheet at face value, but to contact the component vendor to learn as much as possible about a component’s characteristics and how these characteristics relate to the design.
An example is the expected maximum current flow or voltage the component will need to handle. If the component is not selected for sufficient current or voltage, the component may burn out. A burned capacitor as shown in Figure 1.
Figure 1: Considerable current or voltage flowing through the circuitry due to poor component selection can result in damage like this burned capacitor.
Let’s take another example, a land grid array (LGA) packaged device. In addition to electrical and mechanical constraints, you may need to consider the kind of solder paste recommended, the allowed or not allowed reflow temperatures, and the allowed levels of solder joint voiding.
There is no specific IPC standard for voiding criteria associated with devices like LGAs. In some cases, LGA devices with voiding levels up to of 30 percent have been reliable to date. However, generally speaking, lower voiding levels of 25 percent maximum are better and 20 percent is better yet. Figure 2 shows a solder ball with a 20.41% void, which is acceptable for IPC Class II.
Figure 2: Solder ball with a 20.41% void is acceptable for IPC Class II.
In the absence of void data, design engineers have to rely on their experience, know how, and common sense to assure they can perform their designs with easy-to-find components that aren’t at an end-of-life cycle and that are available from multiple sources.
Performing extra analysis and calculations is also highly important in component selection, for instance, calculating current or voltage during peak performance. A component might be specified at a certain peak temperature and current level. However, when it comes to a particular design, the PCB designer must take the initiative to assure that he or she is the one making these critical calculations.
The responsibility rests with the engineer to not only perform calculations on a single component, but consider that component’s relation to other components used in that particular design. For example, calculations are especially important for analog components generating a high level of heat. Let’s say a number of analog components are placed next to each other on one side of the board. Those are creating considerably more power and thereby generate more heat compared to the other side of the board, which is digital in nature. In such a case there is a possibility of solder mask de-lamination occurring on the heavily populated analog component side.
Analog portions of the component’s circuitry can generate a lot of heat. Overheating can create delaminating of the solder mask or in a worst case scenario, it could burn and damage the components. Figure 3 shows board de-lamination.
Figure 3: Poor heat dissipation can lead to PCB de-lamination.
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