Leveraging high-volume CMOS for MEMS-based frequency control

Emmanuel Quevy, Silicon Labs

January 05, 2014

Emmanuel Quevy, Silicon LabsJanuary 05, 2014

Over the last five years, frequency control and timing products based on micro-electromechanical systems (MEMS) technologies have steadily eroded the 100-year-old monopoly held by quartz crystal solutions. Manufactured using standard semiconductor fabrication techniques, MEMs-based products offer significant improvements in size, ruggedness, and cost.

However, the full potential of MEMS has been realized only recently with the advent of CMEMS (this acronym is derived from the contraction of CMOS + MEMS) fabrication technology. This unique process can be used to fabricate both micro-electromechanical and CMOS electronic devices on a single die, allowing designers to leverage the economies of scale afforded by standard semiconductor processes to create single-chip frequency-control products that enjoy smaller form factors, better performance, lower cost, and greater scalability.

MEMS technology uses standard semiconductor processes to fabricate micro-electromechanical elements such as pressure sensors, accelerometers, and resonators on silicon wafers or other commercially-available substrates. While the compact form factors afforded by MEMS technologies were the original motivation for their adoption, timing product manufacturers quickly discovered that they also offer several other significant advantages. These include improved lead times, supply stability, product reliability, and the ability to make finely-tuned price/performance tradeoffs.

MEMS devices don’t suffer from some of the inherent limitations of quartz-based technologies that required ceramic-based packaging (Figure 1), off-chip matching capacitors, and complex, highly specialized manufacturing flows to achieve acceptable levels of reliability and performance. The resulting devices were able to achieve acceptable accuracy, but they still possessed an inherent sensitivity to environmental factors, such as thermal stress and, in particular, shock and vibration, which increased their potential for field failures.


Figure 1: Diagram of a typical quartz-based oscillator assembly with ceramic packaging

Until recently, MEMS elements were integrated into frequency-control and clock products using the same methods developed for quartz-based products and other MEMS products. While combining a MEMS resonator chip with a separate IC in a multichip module (Figure 2) allows the use of more standard packaging techniques, it still relies on integrating separate devices from boutique (i.e. expensive) MEMS foundries and high-volume CMOS foundries, resulting in sub-optimal system performance and cost.


Figure 2: Micrograph of a multi-chip MEMS-based oscillator

CMEMS: Monolithic integration of CMOS and MEMS
These shortcomings have been overcome largely by CMEMS, which enables the modular post-processing of MEMS devices directly on top of CMOS circuitry. This unique approach to MEMS integration is the first technology of its kind to allow direct post-processing of high-quality MEMS layers on top of advanced RF/mixed-signal CMOS technology (0.18 µm and below). Manufacturers can now add MEMS elements to their sensors’ signal processing and interface electronics using the same advanced CMOS manufacturing line which fabricates as a scalable, state-of-the-art, modular back-end-of-line option (Figure 3).


Figure 3: Basic sequence of the CMEMS manufacturing flow
(a) Starting material in the form of a passivated and planar CMOS wafer on top of which (b) polycrystalline SiGe is surface-micromachined into integrated MEMS devices, which are (c) encapsulated in a vacuum using wafer-level bonding. The fully finished wafer continues to probing, (d) die singulation and standard small-size packaging assembly, just like a standard CMOS product.

By processing the resonator directly on top of an advanced mixed-signal IC, CMEMS technology enables a fully monolithic solution which brings significant benefits to the frequency control industry, including smaller size, better performance, lower cost, and greater scalability.

CMEMS technology uses polycrystalline silicon-germanium (poly-SiGe) as its MEMS structural material. This material is considered ‘CMOS-friendly, i.e., its thermal budget is compatible with the CMOS backend process. Poly-SiGe can be deposited at around 400°C, allowing it to be deposited directly on top of mainstream CMOS wafers without melting existing devices and backend materials. It also allows the use of pure germanium (Ge) as a sacrificial material. Ge can be dissolved using hydrogen peroxide (H2O2), commonly used in CMOS backend processing as a much friendlier etchant than other chemicals found in other MEMS release processes.

Achieving process compatibility between MEMS surface micromachining and advanced CMOS fabrication is important, but a single-chip solution also requires strict attention to material quality. In most MEMS applications, material quality and deposition temperature tend to go in opposite directions. While metals like aluminum and copper are compatible with CMOS processing, their poor mechanical stability disqualifies them as structural materials.

On the other hand, SiGe stands out in this key aspect: above 400 °C, SiGe can be deposited as a polycrystalline material, with properties similar to polysilicon, a common MEMS material. Both materials enjoy high fracture strength and low thermoelastic losses (i.e., high Q), and SiGe does not exhibit creep or hysteresis when cycled through stress. These properties are absolutely critical for fabricating high-performance MEMS devices, in particular for the long-term stability required in frequency control.

In addition to the material advantages of SiGe, CMEMS technology offers several other key features that make it robust and optimal for system integration:
  • A combination of plug and damascene contact modules with specific barrier layers ensures low ohmic contact resistance between the top metal and the SiGe MEMS layers; this technique minimizes contact size and access parasitics.
  • A spacer module allows high aspect ratio electrode gaps to be defined for in-plane electrostatic transducers with relatively high efficiency.
  • Flexibility around the structural thickness (2-4 µm) allows surface micromachining of thin and compact structures, enabling both in- and out-of-plane modes of operation.
  • A silicon dioxide slit module embedded in the structure enables mechanical compensation of thermal drift along with electrical isolation.
  • Eutectic seal wafer-to-wafer bonding allows ultra-clean vacuum hermetic encapsulation of the MEMS device.

Building the MEMS structures on top of existing CMOS wafers involves several challenges. First, thermal compatibility does not mean that the materials and devices behave identically when taken through the thermal cycles of the manufacturing flow. For example, SiGe is compressive with a coefficient of thermal expansion (CTE) in the single digit ppm/oC range while the metal stack underneath is usually tensile, and has a CTE in the 10-20 ppm/oC range. Producing workable MEMS structures and reliable electrical interconnects requires expert knowledge of all materials involved in the flow and technical expertise in designing them to coexist.

Substrate outgassing is also a concern. Thermal cycles tend to liberate loose molecules that can diffuse out of the substrate into the cavity and change the resonator’s properties. Accordingly, one must attend carefully to the physico-chemistry of the backend materials during deposition to achieve a vacuum encapsulation that’s adequate for both the short-term (quality factor) and long-term stability (aging) of the device.

Yield loss stacking presents another challenge as the complexity of any given manufacturing flow is increased. Fortunately, the CMEMS process employs CMOS fabrication lines, among the most highly-controlled manufacturing environments in the world. As a result, the overall effect of yield compounding is minimal, and the final yield numbers remain similar to those of CMOS - in the upper 90 percent range.

The current design rules for the CMEMS manufacturing process allow integration of MEMS devices with 0.2 µm spacing and 0.5 µm line feature size on top of 0.13 µm RF/MS CMOS with eight metal layers. The same manufacturing capability has also been demonstrated in a 0.18 µm process. CMEMS is now running in production at a top-tier CMOS foundry with a large capacity (>1,000 wpm), supported by a complete and mature product/process design kit (PDK). Consolidating CMOS, MEMS, vacuum encapsulation, wafer acceptance, and chip probe on the same line offers significant benefits in terms of scalability and quality assurance. CMEMS can also be considered a platform technology, allowing different types of devices (resonators, inertial sensors, etc.) to be manufactured within the same flow.

Integrating MEMS changes everything
The ability to integrate active electronics with MEMS elements will dramatically reduce the cost of frequency control products, but are there any other reasons to believe it’s an irreversible trend in the timing industry? Here are a few reasons why the answer is an overwhelming “yes”.

Market pressure – The relentless price reductions that characterize maturing markets drive the consolidation of more functions into system-on-chip (SoC) devices. Much as the metal options for integrated passives on CMOS unleashed a wave of breakthrough products a few years ago, CMEMS’ ability to embed MEMS devices directly on top of CMOS will fuel the next wave of innovation.

Form factor - CMEMS technology eliminates the need for the bulky packages with stacks of passive and active ICs used by the current generation of oscillators, inertial sensors, or quartz devices. Without monolithic integration, most designs must employ packages that are relatively thick, occupy relatively large amounts of PCB space, and whose discrete components add to system complexity.

Performance - Monolithic integration techniques offer more flexibility in system design optimization. For example, (Figure 4), the critical gain needed in an oscillator’s feedback amplifier is largely influenced by the parasitic capacitance present between the active part and the resonator. This is represented by the parameter, p. The higher the p parameter, the lower the gain (gmcrit) needed to generate a stable oscillation, which results in less power (I0) required to produce the same output level (V0).


Figure 4. Basic circuit schematic of a resonator-based pierce oscillator with equations of critical gain (gmcrit), parasitic load (p) and output voltage amplitude (VO).

Losses in the resonating element also affect power consumption but, for micro-scale devices, their insertion loss (represented by the motional resistance, Rx) is far outweighed by the devices’ extremely low parasitic losses, resulting in a system that is easier to optimize for low power. Sensors also benefit from improved performance through MEMS integration because the reduction in parasitic capacitances between the sensor and the readout circuit improves their effective sensitivity.

Reduced cost – This may be the biggest motivation behind CMOS-MEMS monolithic integration. Incorporating MEMS into the CMOS manufacturing line eliminates the need for a separate, dedicated (and costly) MEMS fab. CMEMS technology allows a CMOS foundry to add a robust MEMS product design kit to the toolset associated with its shared manufacturing line. With the ability to create MEMS devices using industry-standard wafer processing equipment, foundries can offer their MEMS customers a future-proof growth path as the semiconductor industry migrates to subsequent generations of high-density processes and larger wafers. Co-integration of MEMS and electronics also makes wafer-level chip-scale packaging possible for dramatically lower assembly and test costs.

Frequency control product challenges
Although quartz’s excellent aging characteristics and short-term stability made them the standard for frequency control, they also suffer from several limitations and can’t provide some of the most important features commonly available in MEMS-based frequency control products.

MEMS-based solutions, and in particular CMEMS, don’t rely on specialized manufacturing flows used to produce quartz timing products that complicate the supply chain with long lead times (several weeks or even months). Because they use standard manufacturing and packaging techniques, CMEMS devices enjoy shorter lead times (less than two weeks) and are available in highly-compact packages, with even smaller sizes anticipated in the near-future.

MEMS structures can tolerate much higher levels of stress, vibration, and shocks than quartz devices, a feature that greatly improves reliability and reduces their potential for field failures. CMEMS integrated clocks are also less sensitive to board design and EMI issues than off-chip quartz resonators, and can go through reliability qualification flows similar to those used for CMOS-only products that are far more stringent than those used to qualify quartz-based products.

While MEMS resonator technology has conquered many fundamental limitations of quartz crystals, it initially entered the frequency control market with its own set of challenges. First, as a side-effect of their smaller size, a MEMS resonator has much lower transduction efficiency than an equivalent quartz-based device, resulting in a significantly lower signal-to-noise ratio. Second, classic MEMS materials, including mono-crystal and poly-crystal silicon or even poly-SiGe, display significant drift with temperature.

Unless carefully designed, MEMS resonators can suffer from lower overall stability due to frequency temperature coefficients as large as -30 ppm/oC. In addition, MEMS devices’ small size makes them much more difficult to physically trim than their quartz counterparts, which impacts initial accuracy. The engineering knowledge of aging and reliability characteristics for MEMS devices is much less mature than quartz devices, one of several reasons why their offset specifications have usually been in the realm of % instead of ppm or ppb. As a result, a basic MEMS resonator has a 6-sigma range of about ±0.2%, far from the 10-20 ppm usually required for frequency control.

To address these issues, a MEMS-stabilized VCO can be constructed, which employs a separate oscillator locked to the MEMS reference through a complementary circuit (Figure 5). If there is any inaccuracy present in the MEMS reference, the control loop forces a predetermined ratio between the MEMS oscillator and the VCO, which corrects its output frequency. The circuit’s digital PLL allows its output frequency to be programmed, a feature that quartz oscillators cannot accommodate without additional circuitry. The VCO can also accept a temperature sensor input which allows it to correct for MEMS oscillator temperature drift by adjusting its trim values.


Figure 5: Example of CMEMS programmable oscillator

The inherently large temperature drift of MEMS resonators created another weakness in early MEMS solutions: a very steep open loop transfer function from the temperature sensor to the VCO frequency output. This can result in significant short-term stability problems and sensitivity to fast transient temperature variations.

CMEMS technology tackles this issue by dealing with the problem at its root, namely the mechanical stability of the MEMS resonator, by adding a mechanical compensation mechanism to it. The mechanism is created by alloying critical areas of the resonator’s structure with another material that has the opposite behavior over temperature. SiGe and other MEMS structural material typically exhibit TCE (Young’s modulus temperature coefficient) values in the range of -60 to -80 ppm/oC, which effectively means that they soften as temperature increases. Silicon dioxide (SiO2), a commonly-available material in a CMOS manufacturing environment, becomes harder as temperature increases. By putting compensating material in the form of small slits of oxide where it matters most – at the maximum stress point, a MEMS resonator can achieve stability over temperature similar to quartz resonators.

The Lamé mode resonator in Figure 6 has compensation for its contraction and expansion modes, consisting of patterned slits of oxide embedded in the structural layer. The resulting interaction provides a compensation of the first-order coefficient that is very close to zero (from about -30 ppm/oC for native SiGe bulk mode devices) into a second-order characteristic where the frequency is stable across temperature, nearing the behavior of an AT-cut quartz crystal. Unlike quartz rock cutting, this technique can be applied to any mode shape – in-plane or out-of-plane, any frequency and, more generally, any mechanical device.


Figure 6: Top and cross-section views of a plate resonator, mechanically compensated for temperature stability

With a simple change of the mask pattern defining the oxide slit, thermal drift can be eliminated. This feature, along with careful design of the temperature sensor (designed to reach the best noise/power tradeoff), allows CMEMS-based oscillators to exhibit short-term stability in the range of a few ppb, which is orders of magnitude lower than first-generation MEMS oscillators. Temperature calibration then completes the process, compensating the device’s temperature stability at the system level to ppm levels over full industrial range.

CMEMS technology also offers significant performance gains over complex, multi-chip designs where thermal slew across the assembly becomes a dominant factor in the compensation loop. In a typical two-chip stacked die assembly, the CMOS chip, wire bonds, and die attach epoxy, the MEMS chip and the package itself all affect heat transfer between the resonator and the temperature sensor used to compensate for thermal excursions. CMEMS-based solutions overcome these issues with mechanically-compensated devices, ultra-short thermal paths, and small thermal time constants which make them orders of magnitude more resistant to thermal slew than any other existing solution.

Finally, mechanical temperature compensation also plays a critical role in minimizing the impact of environmental effects, for example, thermal strain induced offset of the temperature sensor which directly impacts solder reflow shift, aging, and overall accuracy. Details of experiments that compare the thermal stability of CMEMS, two-chip MEMS, and quartz technologies are well-documented in the technical paper from which this article was derived [1]. The same white paper also includes detailed information on how CMEMS systems can be designed to minimize sensitivity to thermal, frequency, and voltage reference drift, which can occur due to environmental factors or the aging processes that occur in the package and the product integrated devices themselves.

Based on these demonstrated results, CMEMS technology’s outstanding control and robustness under adverse conditions allows CMEMS solutions to specify frequency initial accuracy and stability inclusive of all effects over the lifetime of the device. This key characteristic, also known as total accuracy, is not available from quartz or other MEMS-based oscillators.

A paradigm shift in the frequency control - and beyond
CMEMS technology is poised to create a positive disruption in the frequency-control industry by combining all the advantages of MEMS-based solutions while retaining and even improving many of the best characteristics of quartz solutions. These beneficial characteristics include:
  • Streamlined wafer level manufacturing in an advanced CMOS line
  • Streamlined standard packaging
  • Programmability and short lead times
  • Reliability meeting IC industry standards
  • Low aging characteristics
  • Low strain sensitivity (initial accuracy post solder reflow)
  • Good temperature stability (mechanical compensation)
  • Immunity to fast thermal transients
  • Extended frequency range for low-noise references
  • Immunity to EMI

CMEMS technology’s ability to support wafer-level, chip-scale packaging opens the possibility of extending the packaging and form-factor roadmaps beyond standard oscillator footprints. If needed, finished CMEMS products can also be delivered in wafer form, enabling the sale of wafer-calibrated, guaranteed frequency references for system-in-package integration. Such a business model would allow these timing devices to be integrated into each single SoC as a companion chip or, in some cases, on the SoC itself using direct post-processing techniques.

Emmanuel Quevy is director of MEMS engineering for timing products at Silicon Labs, (www.silabs.com) overseeing design and integration of timing solutions using Silicon Labs’ proprietary MEMS technologies. Prior to Silicon Labs, he was co-founder, director and CTO of Silicon Clocks (acquired by Silicon Labs in 2010), where he led technology and MEMS-based product developments. He has co-authored more than 40 technical publications in the field of MEMS, is co-inventor on more than 25 issued US patents, and regularly serves as reviewer and committee member of various journals and conferences. He received an Engineering Degree from ISEN Lille, France, and the M.Sc. degree in electrical engineering and computer science from the University of Science and Technology of Lille (USTL), France, both in 1999. He then received the Ph.D. degree in electrical engineering from USTL in 2002.

References:
1. E. P. Quevy, "CMEMS Technology: Leveraging High-Volume CMOS Manufacturing for MEMS-Based Frequency Control," a white paper published by Silicon Labs

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