Addressing IoT and Industry 4.0 sensor backplane needs with an embedded smart analog architecture
The Internet of Things (IoT) sensor backplane is driving a need to associate multiple sensor inputs into a single node in order to minimize the workload on the wireless gateway and enable unobtrusive and cost effective form factor solutions. These are also needs as defined by Industry 4.0 requirements where intelligent network sensors are called upon to provide fully automated control environments in an industrial factory setting, accounting for multiple sensed parameters. These parameters include temperature, pressure, flow, position and more. The sensor backplane is also called upon to support the PHY layer interface to wired communication protocols minimizing the number of system components.
This bimodality requires that the node interface manage various input and output signals and as a result manage different signal conditioning solutions. In this paper we discuss the benefits of a configurable analog architecture integrated into a 16-bit microcontroller (MCU) which provides for the signal conditioning requirements of various sensor nodes. The modular analog architecture is configurable via register settings and enables dynamic interfacing across different analog modules and through the microcontroller for additional data processing. Provided are several signal conditioning circuit examples enabled by the configurable sensor interface as required in many IoT and Industry 4.0 sensor backplanes and comparison of actual circuit results with corresponding SPICE simulations of the signal conversion.
Benefits of embedded flexible analog architectures
The analog front-end provides a bridge between the real world signal and the microcontroller for end node solutions that make up the IoT and Industry 4.0 sensor backplanes. The signal conditioning implementation converts the continuous time domain signal into a digital bit stream that can be processed by the embedded MCU to either provide real-time calibration of the sensor output parameters and subsequent signal conditioning or to act on the world around it – in this case, in the form of digital-to-analog converters (DAC).
The digitally controlled analog modules of the configurable analog architecture perform a critical signal transformation to ensure signal compatibility within the system. The analog sensor front-end may be called upon to amplify the signal so that it may fit the range within the data converter specifications for analog-to-digital conversion (ADC). It may also provide a conversion of a sensor output current signal to a corresponding voltage signal so that it can be further converted into the digital domain. Additionally, the signal conditioning circuit must manage amplification of differential voltage signals commonly used in most resistive bridge circuits. Finally, the output response of the sensor may introduce high frequency or low frequency noise which interferes with the primary signal response. The signal conditioning circuit provides for the appropriate filtering solution whether as a low pass or high pass filter.
Having the sensor signal conditioning integrated into the microcontroller provides for better system power consumption as functionality is distributed in a single chip. This also translates to increased throughput with faster system switching times and a reduction in system noise. Inherently these mixed signal designs will also lead to simplified system designs with pre-verified aspects of the component integration. Signal and power integrity conformance to device specifications is verified through specification-based functional validation. This allows the system designer to speed up the design process as functional verification of the flexible analog architecture and MCU blocks is carried out across different modes of operation. This alleviates concerns to susceptibility to noise associated with power supply, cross talk and random noise (burst, flicker, shot, thermal etc.). Design layout is additionally optimized to assure proper signal and power integrity without excessive isolation, which can significantly increase die size. Overall the single-chip solution which handles the signal conditioning of multiple sensor inputs results in a reduction of the bill of materials (BOM) and PCB board size. A number of end-equipment applications within the IoT and Industry 4.0 space can benefit from the small form factor and low power solutions enabled by the embedded configurable analog architecture.
In health and fitness applications, sensors worn on the body provide for continuous monitoring of physiological and psychological parameters without tethering the patient or athlete to a wired hub. The need to monitor for extended periods of times drives a need for ultra-low-power and unobtrusive designs. In factory settings, sensor solutions which are incorporated into the industrial connector itself drive a need for very tight space constraint system solutions. The connectors, as defined by International Electrotechnical Commission (IEC) standards, do not currently call for inclusion of the sensor electronics, but are driving to smaller and smaller form factors which further complicates the ability to incorporate the sensor component at the interface to the wired connection. In building automation applications, the sensor end node is called upon to manage the signal conditioning for multiple sensors, monitoring such parameters as temperature, humidity, light, movement and sound. The ubiquitous nature of these sensor end nodes drives a need for integration of multiple module requirements within a single component node. These include sensor signal conditioning, data conversion and processing of the component data.
Configurable analog architecture
Figure 1 highlights the configurable analog architecture. In this case we show the block diagram for the operational amplifier. Internal and external connectivity is enabled by register settings which provide for a flexible architecture to support multiple sensor signal conditioning needs. In addition, these analog modules support modes to sample independent of the central processing unit (CPU) which provides for very low-power system solutions.
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Figure 1. Configurable analog architecture (Source: Texas Instruments)
At the heart of this configurable analog architecture is the general purpose operational amplifier that is software configurable to support different sensor signal conditioning requirements discussed earlier. The three terminal device can be configured as a transimpedance amplifier (TIA), an inverting and non-inverting amplifier, a differential amplifier, a summing amplifier and as a low pass and high pass filter. Using the resistor ladder on board the analog architecture, the operational amplifier can be programmed to support a number of amplifier gains. In addition, the inputs can support external feedback resistors to provide gains greater than those available by the integrated resistor ladder. Key features of this module include single supply operation, rail-to-rail output and programmable settling time vs. power consumption. The architecture could contain multiple operational amplifiers to support signal chain solutions that require them as in the case of high input resistance instrumentation amplifiers.
The remaining modules in the configurable analog architecture include a DAC, an ADC and a comparator. The resolution bits of the DAC and ADC are chosen in order to achieve the sensor sensitivity called upon by the application. The configurability of these components is similar to that of the operational amplifier and is enabled by register settings accessible to the user. The configurable analog architecture can be set up to act independently of the CPU which leads to very power efficient solutions. The individual modules in the analog architecture can be configured to support distinct signal chain solutions as long as sampling of the different sensors does not have to be carried out simultaneously and the same analog modules are not used in the signal conditioning circuit. The built-in internal multiplexer drives switching times between the multi-channel inputs in the nano-second range. Future solutions will incorporate multiple instantiations of the configurable analog architecture within the embedded controller enabling the simultaneous sampling.