Semiconductor IP leaders Sonics, Inc. and MIPS Technologies team to illustrate the most effective ways to optimize your wireless SoCs for superior performance, power and cost efficiencies, and system flexibility. The presenters will also share the on-chip 'must-haves' essential for high-performance, power-aware wireless designs.

This class uses Micrium's recently released uC/OS-III as a reference, and is presented by the kernel's author, Micrium's Founder, Jean Labrosse, in conjunction with one of the company's software experts, Matt Gordon. The class describes real-time kernels from generic terms to specifics involved with an ARM Cortex-M3 architecture.

In this webinar we'll explore the embedded design challenges you face on a day-to-day basis and how you can overcome them with true system-level programmability, as exemplified by Cypress's PSoC' programmable system-on-chip architectures and the PSoC CreatorTM development software. We'll explore how you can apply a system-level programmable design methodology to your embedded designs today. This methodology allows you to: Adapt to change; Get to market faster; Deal with analog complexities; Protect your design IP

Join Arrow Electronics and Microsoft for a live, online webinar featuring the newest version of Windows' Embedded CE. Learn how this sophisticated operating system: Enables you to create differentiated devices that deliver immersive user experiences and rich connected experiences; Delivers some of the best embedded tools and technologies to help you build reliable, powerful, and intelligent embedded devices for your customers; Helps you create compelling consumer and enterprise devices by adding technologies like Silverlight and Internet Explorer Embedded; Enables natural input capabilities and gesture animations with its plug-in engine; Provides infrastructure technology to manage multiple network interfaces on the device

Join Kerry Johnson of QNX Software Systems and Steve Klinger of Cavium Networks as they address some of the key questions confronting developers building network applications for multi-core processors. This session will explore fundamental issues, such as high-availability, reliability, performance and troubleshooting, and review the case for a true microkernel real-time operating system on high-performance multi-core processors.

This webinar includes a briefing from the Mentor Graphics OS engineering team, who will discuss the implementation of Nucleus OS and Linux on the Marvell Sheeva MV78200 Dual-core Embedded Processor.

In this course we will explore some of the fundamentals of ESL with particular emphasis on one of the most mature areas, namely high-level synthesis of the hardware portions of the system. While this area is maturing, different vendors have chosen different languages as their starting point and we will explore some of the tradeoffs that this makes.

This class covers sensorless vector control formulation for Brushless DC (BLDC) motors and its implementation techniques. The class starts with basic theory in terms of BLDC motor model, vector control principle, Clark & Park transformation, PWM modulation, flux observer, and speed and position estimation. Vector control based on sensor and its normal processing is briefly explained. Then the class focuses on processing for a sensorless vector control that does not use position or speed sensors. Specific implementation of the motor model based flux observer and overall sensorless vector control implementation strategy is described. Also, techniques for measuring currents via conventional sensors and using one-shunt reconstruction are explained. Finally, this class demonstrates the performance of sensorless vector control regarding speed regulation and CPU bandwidth usage.

Handheld mobile devices provide an ever richer range of applications and connectivity which, when combined with their limited computing resources and physical accessibility, implies a unique set of security issues. High-value services must operate alongside low-risk features and even user-downloaded applications. The complex mixture requires a rich OS environment which carries with it its own inherent vulnerabilities. This class outlines a security architecture tailored to provide the assurance required for high-value services while at the same time allowing the freedom needed for user-downloaded applications on the same device. Starting with the hardware components providing tamper-resistant monitoring and debug port protection, the class moves through tamper-evident software load and execution and through to system and user data protection. Finally, the class outlines the integration of these elements with software virtualization technology to provide assurance for high-value services. The virtualization solution runs a strictly contained and hardware access-restricted User OS. Alongside, but fully isolated from the User OS, virtualization allows a Trusted Execution Environment (TEE) to run, in which high-value services may operate out of reach of other features and applications.