More about designing with Embedded DSPsFor your convenience, collected here is an archive of Design and Product How-To articles that have been posted on line at EET/Embedded.com about designing with Digital Signal Processors (DSPs). For broader issues relating to algorithm development and implementation in hardware or software, you should also check out the EET/Signal Processing DesignLine. I am constantly updating this list, so check back occasionally to see what's new:
DSP Tricks: Computing inverse FFTs using the forward FFT
Two neat ways to compute inverse Fast Fourier Transforms using the forward FFT algorithm.
DSP Tricks: Approximate envelope detection
Some useful tricks for computing approximate envelope detection, useful in estimating signal magnitudes in automatic gain control.
DSP options to accelerate your DSP+FPGA design
Before embarking on a high-performance DSP system design, it would pay to evaluate the DSP solutions portfolio offered by the different silicon vendors. This article explores some typical DSP solutions.
How to achieve 1 trillion floating-point operations-per-second in an FPGA
ed on recent technological developments, high-performance floating-point signal processing can, for the very first time, be easily achieved using FPGAs.
The basics of DSP for use in intelligent sensor applications
In this three part series, the basic framework is described for using digital signal processing in analyzing and processing analog data gathered by intelligent sensors. Part 1: Foundational DSP concepts.
Digital Lowpass: A filter by any other name is still a filter
Understand the realization of an analog filter in digital domain, using an FPGA
The Need for Variable Precision DSP Architecture
FPGAs with variable-precision DSP block architecture are the only programmable devices that can efficiently support many different precision levels including floating-point implementations. This DSP architecture enables the next-generation of high-precision and high-performance signal processing applications.
Increasing bandwidth in industrial applications with FPGA co-processors
This article discusses the general issues of moving part, or all, of a DSP industrial application onto an FPGA using system software design tools. Using an FPGA and automated design software, design engineers have the ability to optimize system performance in ways not possible with a traditional DSP.
Using a scheduled cache model to reduce memory latencies in multicore DSP designs
Freescale engineers describe a new software mechanism " the scheduled cache model " and the supporting hardware that reduce the need for DMA programming and synchronization to achieve high core utilization, relying on hardware mechanisms (some controlled by software) to increase cache efficiency.
Analysis of Microchip's PIC32 library
With the 32-bit MIPS 4K core, Microchip is now competing with the ARM juggernaut so offering optimized DSP libraries for the PIC32 is a good strategy. BDTI's Jeff Bier examines the library, in particular he looks at how it stacks up against ST Micro's ARM Cortex-M3-based STM32 library offering.
Floating a new (DSP) idea
Floating point (FP) DSP architectures have been around for a long time and are notable for their raw performance versus fixed point. However, TI Principal Fellow Gene Frantz 'floats' the possibility of a new architecture that could quadruple a floating pointer's performance. What do you think?
PRODUCT HOW-TO: Complex matrix inversion on the StarCore SC3850 DSP
Complex matrix inversion is used in LTE, WiMAX, and other communication applications. Here's how to do efficient 4x4 complex matrix inversion on the StarCore SC3850. Source code and a MATLAB reference model are included.
PRODUCT HOW-TO: DSP/FPGA platform for video surveillance
Avnet's video surveillance platform pairs a TI DM6437 DaVinci DSP with a Xilinx Spartan-3A DSP FPGA. here's how the platform works, and how to get the most out of it.
Analysis: ST's low-cost MCU gets DSP software
BDTI examines ST's new library of DSP software for its low-cost ARM microcontroller, the STM32. The library includes a speech codec, FIR and IIR filters, a PID controller, and an FFT.
DSP Tricks: Frequency translation using decimation
Here is a tip on how to do freguency translation using decimation.
Analyzing DSP networks with Mason's Rule
Here is an easy way to obtain the z-domain transfer function of a DSP network (DSP block diagram)
The math of DSP: Part 5 - Orthogonality
Explained is the concept of orthogonality and the concept of quadrature signals is introduced.
The math of DSP: Part 4 - Convolution, Fourier and Nyquist
Explained are the details of convolution and Fourier series calculations and the Nyquist sampling theorem
The math of DSP: Part 3 - Filters
The basics of low-pass and high-pass filsters and an explanation of the concept of causeality.
DSP Tricks: DC removal
Some tips on block data DC removal, real time DC removal and real time DC removal with quantization.
The math of DSP: Part 2 - Complex numbers
Topics covered are real and imaginary numbers, periodic signals, digital frequencies and discret arithmetic.
The math of DSP: Part 1 - Series, integration and frequency
The basic math for DSP, including polynomials, transcendentals, series, limits, integration, polar notation and frequency.
DSP Tricks: Efficient polynomial evaluation
Here are some tips on on efficial polynomial evaluation
Analysis: Freescale's six-core DSP
BDTI examines Freescale's new six-core DSP chip, the MSC8156, which targets wireless base stations.
Combining DSP and MCU operations in computationally complex time-critical apps
A Product How-To on using the Fujitsu 91470 MCU/DSP combo for digital filter apps that evaluate systems states and carry out fast loops
What's your sine?
A new approach to direct digital frequency uses a combination of lookup tables and trig identities that lends itself to more efficient implementation on DSPs.
DSP Tricks: Smoothing impulsive noise
Some tips on smoothing impulsive noise by using a technique originally used to detect microampere changes in milliampere signals.
Optimizing video analytics on a DSP
Here's how to implement both video compression and analytics on a single DSP. Topics covered include algorithm, memory and code optimization.
Speeding up the CORDIC algprothm with a DSP
When a CORDIC algorithm is implemented on a DSP, can the multipliers improve CORDIC performance?
DSP Tricks: Interpolating a bandpass filter
Some tips on interpolating a bandpass signal
Architecture oriented C optimization techniques: Part 2 - Memory and more
How to optimize C for memory alignment, cache features, endianness and application specific instructions.
Architecture oriented C optimization techniques: Part 1 - DSP features
Here is how C optimizations can take advantage of zero overhead loop mechanisms, hardware saturation, modulo registers and more.
Implement dual OS signal processing with Linux and the DSP/BIOS RTOS
In mixed signal DSP/GPU environents use a system virtual machine to run both Linux and the DSP/BIOS RTOS concurrently on the same DSP processor.
DSP Tricks: Interpolating a bandpass signal
Some tips on the interpolation of a bandpass signal.
DSP Tricks: Spectral leak location algorithm
A useful way to estimate the frequency of a sinusoid or the center frequency of a very narrowband signal..
Using programmable logic for efficient and effective DSP design
With an FPGA front-end that allow access to the latest I/O technology, as well as IP blocks for the latest standards, designers have flexibility to choose the right interfaces without making changes to the DSP software.
Asynchonous DSPs: Low power, high performance
An acynchronous DSP offers better power, performance and reliability than one based on standard synchronous logic, enabling simpler and less expensive PCB and power supply design.
DSP system design: Part 2 - Critical design choices
How to choose hardware and software architectures, how to choose an RTOS and how algorith and I/O libraries impact the development process.
DSP system design: Part 1 - The basic laws
Ten laws that yout can use to guide DSP system developing including such topics as economies of scale and experience effect, DSPs vs. FPGAs, fixed- vs. floating-point and RTOSes and algorithm libraries.
Signal processing on the MIPS 74K
BDTI evaluates the signal processing features of MIPS high performance superscalar core, the 74k.
DSPs versus FPGAs for multiprocessing
Here's whats available for high performance multiprocessor systems and how to make the best choice between DSP, FPGA or a hybrid of the two.
Avoiding noise and EMI problems in DSP systems
Noise and EMI can disrupt the operation of a DSP system or cause the design to fail FCC certificqtion. Here is how to avoid these problems with PCB layou and return path coupling.
Modulation roundup: error rates, noise and capacity
A comparison of various digital signal modulation schemes such as BPSK, QPSK, PAM, 16PSK, 32PSK, 16QAM and 64QAM using a variety of metrics.
DSP Tricks: Computing FFT twidle factors
Some useful tricks for computing Fast Fourier Transform twiddle factors.
DSP Tricks: Building a practical spectrum analyzer
Some tricks for implementing a spectrum analyzer by modifying the time-domain data before applying a radix-2 FFT algorithm.
Frequency domain toutorial: Part 2 - Complex signals and spectral diagrams
Building on the basics introduced in Part 1, this article introduces the concept of quadrature (complex) signals and explains the nature and notation of the spectral diagrams used in DSP.
Freguency domain tutorial: Part 1 - Dealing with ambiguity
What you need to know about the mathematics and notation of FFTs and the discrete frequency domain, starting with how to deal with discrete signal ambiguities.
Speaker equalization using FIR filters
Pros and cons of using FIR filters for speaker equalization versus DSP-, MCU- and FPGA-based approaches.
DSP Tricks: A/D conveter testing techniques and finding missing codes in ADCs
Some tricks for using DSP techniques to test A/D converters and some tips on how to detect missing codes in ADCs.
Symbol error rate for M-QAM modulation
Krishna Pillai shows how to calculate the error rate for modulation schemes such as QPSK, 16-QAM, 64-WAM and provides a MATLAB/Octave scripts for computing symbol error rate.
Making design choices between DSPs and FPGAs
Design guidelines on how to choose between DSPs and FPGAs or a combination of the two taking into account device cost, performance, NRE and availability of application-specific features.
Multirate DSP: Part 3 - ADC oversampling
The principles of oversampling in analog to digital converters and how to apply these to a signal-delta ADC.
Multirate DSP: Part 2 - Noninteger sampling facors
How to change the sampling rate by a noninteger factor as well as multistate decimation and polyphase filters as will as application of up/down sampling to a CD player application.
DSP Tricks: Reducing A/D converter quantization noise
How to use oversampling and dithering to reduce analog to digital conversion quantization noise.
Multirate DSP: Part 1 - Upsampling and downsampling
Part 1 introduces the concepts of multirate signal processing, explaining how to upsample and downsample by an integer factor. MATLAB code included.
How to implement DSP algorithms using the Spartan-3E FPGA starter board
This "How-to" is an excerpt from "Embedded Design using Programmable Gate Arrays"
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