EDA countdown

September 5, 2012

It is difficult to believe, but it was almost a year ago when I took over the EDA Designline, and what a year it has been. To call it anything but a wild ride would be sweeping a lot under the rug. But for all of the problems, the response has been wonderful and we have had some great design articles appear during the year. I thought I would go back and look at the top ten in my first year and today I will review positions 7 through 10.

Coming in at number 10 is Agile hardware development – nonsense or necessity? written by Neil Johnson of XtremeEDA. Neil has been a repeat contributor during the year and his articles always get the nod from the software guys and the defensive posture from the hardware guys. But there is a growing camp of believers in Agile hardware.

At number 9 is Power awareness in RTL design analysis written by Narayana Koduri of Atrenta. This articles looks at how power can affect other areas of the design such as timing analysis, DFT and others.

At number 8 is Considerations for writing UPF for a hierarchical flow written by Jeffrey Lee and Mary Ann White of Synopsys. This articles takes you through the steps necessary to deal with intent, domains, retention, isolation and more.

And at number 7 is System-level design of mixed-signal ASICs using Simulink: Efficient transitions to EDA environments written by Andreas Mauderer, Jan-Hendrik Oetjens - Robert Bosch GmbH and Wolfgang Rosenstiel - University of Tuebingen. This article discusses an approach for automated transitions from Simulink models representing analog and digital components to HDL descriptions using HDL Coder.

Congratulations to the authors and a big thanks to them for making the first year so great!

Brian Bailey – keeping you covered

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