Lucent adds PCI bus, backplane data interfaces to programmable system chips

November 9, 1999

ALLENTOWN, Pa. -- Lucent Technologies Inc.'s Microelectronics Group here has added two ICs to its line of field-programmable system chips (FPSCs), which combine field-programmable gate arrays (FPGAs) with standard-cell logic on the same chip.

The new 64-bit, 66-MHz peripheral component interface (PCI) FPSC, designated the OR3LP26B, is based on Lucent's current OR3TP12 but doubles the amount of FPGA logic on the chip and doubles the bandwidth between the PCI core and the backend FPGA logic. Included in the standard-cell logic are clock transfer FIFOs and DMA control logic.

The ORT4622 is a 2.5-gigabits-per-second system backplane transceiver, containing a 4-channel 622 Mbits/s full-duplex synchronous interface with built-in clock and data recovery (CDR) in standard-cell logic, along with up to 120 Kbytes of usable FPGA system gates. The CDR circuitry is a macrocell available from Lucent's Silicon Suites macro library, and has already been implemented in several ASICs and standard products in various channel configurations, according to Lucent.

Lucent's aim is to "provide communications intellectual property in a way that eliminates the tradeoffs between design flexibility, functionality and speed, time-to-market, and cost," said Lee Howell, marketing manager for Lucent's broadband intellectual property. He said that "while others are announcing field programmability in their ASIC offerings, we're shipping products."

The devices are fabricated in Lucent's 0.25-micron CMOS technology, and operate at 2.5 volts with 5-V tolerant 3.3-V I/Os. They will be available in December. ORCA Foundry beta software for both devices is available now, with a production version scheduled for January 2000. Fourth-quarter 2000 unit pricing for the ORT4622 will be $98.30 in 25,000-piece quantities, and fourth-quarter 2000 unit pricing for the OR3LP26B will be $76 in like amounts.