FinFETs could be used at 65-nm node, says TSMC CTOSAN FRANCISCO -- The FinFET, a transistor structure with a fin-like semiconductor channel raised vertically out of the silicon surface of an IC that has been touted as the means to scale silicon down to 10-nm gate lengths, could be used as early as the 65-nm process node according to Calvin Chenming Hu, chief technology officer of Taiwan Semiconductor Manufacturing Co. Ltd.
The industry's failure to engineer and prove out a reliable high-k gate stack that limits leakage current for planar transistors could be one reason to go to three-dimensional structures early, Hu indicated in an interview with SBN.
Hu, a distinguished researcher and academic for many years prior to joining TSMC, helped develop prototypes of the FinFET in the 1990s.
The FinFET idea was picked up by Intel, AMD, IBM, and TSMC, and these companies have vied with each other to set the record for the smallest transistor several times. The approach is expected to scale to about a 10-nm gate length.
But although these companies have been pushing to see how far into the future the experimental FinFET could take semiconductors, Hu indicated that FinFETs could cease to be experimental and enter commercial use with the 65-nm process technology, effectively the next process generation.
Advanced Micro Devices Inc. announced it has fabricated the world's smallest double-gated FinFETs with gates measuring just 10-nm in September 2002 (see September 9, 2002, story) before discussing them in a paper at the International Electron Devices Meeting (IEDM) in December.
Hu himself described a complementary pair of so-called Omega FinFET transistors on a 25-nm process at the same 2002 IEDM (see December 10 2002 story). The 25-nm process node is scheduled for production in 2009.
And at the more recent International VLSI Symposium in Kyoto, Japan, Intel took the wraps off a tri-gate transistor structure for a manufacturing process technology with 30-nm critical dimensions could come into use in 2007 (see June 16 story). The vertical tri-gate transistor structure provides high drive current, low leakage current and a minimum of manufacturing difficulties, Intel said.
In an interview with SBN Hu said that the need to optimize transistor performance and leakage current could drive the early use of FinFET devices (see July 16 story).
Hu said: "I think it the FinFET is going to be used, but not wholesale. There won't be a chip where you look in and every transistor is a FinFET. No, it will be used selectively where the performance requires it. I think it could come as early as the 65-nm node."