Cortex-M based MCUS use power profiles to optimize performanceWith its latest Cortex-based LPC1100L and LPC1300L microcontrollers NXP Semiconductors is aiming to raise the benchmarks in 32-bit active power consumption.
The platform combines ultra-low leakage design techniques with NXP’s optimized power-efficient libraries. The MCUs have unique API-driven power profiles which provide users with ready-to-use power management templates.
The low operating power and integrated power profiles make the MCUs and energy-efficient solution for lighting controllers, digital power conversion and management systems, portable battery-powered consumer products and accessories.
Based on the ARM Cortex-M0 processor, the LPC1100L microcontroller has active power consumption at 130μA/MHz and reduces deep sleep current by 60 percent. The LPC1300L based on the Cortex-M3 processor benefits from similar gains in power efficiency while providing a performance boost up to 72 MHz, and is pin- and peripheral-compatible with the LPC1100L.
The API-driven power profiles featured in the LPC1100L and LPC1300L provide users with ready-to-use power management templates which can be customized allowing designers to reach ideal power levels with minimal application intervention. The power profiles provide alternatives to non-configurable low power modes, as they can conduct dynamic power management and optimize CPU operation for various application states.
This feature minimizes overall energy consumption while maintaining the lowest operating current at low supply voltages. Optimised for CPU performance, CPU efficiency and lowest active current, the power profiles enable maximum operating frequency through the entire voltage range from 1.8V to 3.6V without compromising speed or functionality.
In CPU performance mode, the microcontroller is configured to increase CPU throughput by providing more processing capability to the application. NXP says CoreMark benchmark results have proven that scores increase by 35 percent when compared to regular operation.
The CPU efficiency mode is designed to deliver a fine balance between the CPU’s ability to execute code, process data, and at the same time lower active current consumption. The lowest active current mode is intended for applications that focus on lowering active current, keeping the CPU’s high processing capabilities available as required. CoreMark benchmarks have shown a 20 to 30 percent improvement in power consumption when this mode is enabled.
The microcontrollers provide:
- Speeds of up to 50MHz for the LPC1100L and up to 72MHz for the LPC1300L, which are pin- and peripheral-compatible;
- 32 vectored interrupts;
- 4 priority levels;
- dedicated interrupts on up to 13 GPIOs;
- UART, 1-2 SSP, I2C (FM+) as serial peripherals;
- Two 16-bit and two 32-bit timers with PWM/Match/Capture;
- 12 MHz internal RC oscillator with 1 percent accuracy over temperature and voltage;
- Power-on-reset (POR);
- multi-level brown-out-detect (BOD);
- Phase-locked loop (PLL);
- 8-channel high-precision 10-bit ADC with ±1LSB DNL;
- Up to 28 or 42 fast 5V tolerant GPIO pins for HVQFN33 and LQFP48 respectively;
- high drive (20 mA) on selected pins;
- 11 GPIO pins in WL-CSP;
- Single 1.8 – 3.6V power supply;
- over 5kV ESD for rugged applications.
Further information at: www.nxp.com/lpc1100l.