Design Con 2015

ARM’s big-little gets Renesas Mobile’s vote

January 14, 2013

Bernard Cole-January 14, 2013

Renesas Electronic’s mobile chip division has opted for ARM’s big-little architecture in an application processor for use with an on-chip LTE modem.

Designated the MP6530, it is a quad-core big-little processor integrated on the same die with an FDD/TDD Class 4 LTE/DC-HSPA+/EDGE/GPRS/GSM modem.

According to a number of technology news outlets, it makes use of the dual-core Cortex-A15 and dual-core Cortex-A7 processors licensed from ARM Holdings plc. This is a architectural workaround developed by ARM to combine energy efficiency with high performance.

The big-little approach allows software developers to switch software operations between cores optimized for low power and high performance. On average, this makes possible an overall energy saving, especially in applications where the design spends most of its time in standby mode.

It is apparently being aimed at the same smartphone applications that Samsung Electronic’s big-little Exynos 5 Octa is targeting but at lower power. It uses PowerR SGX graphics rendering, dual-channel LP-DDR memory interface, a 20-megapixel image signal processor and wireless connectivity for Wi-Fi, Bluetooth, FM radio and GPS/GNSS.

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