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ASSET’s Arium tools debug ARM code in TI’s KeyStone architecture

October 01, 2013

Toni_McConnel-October 01, 2013

ASSET InterTech’s Arium SourcePoint debugger for ARM offers software and firmware debugging tools to designers of applications based on processors with the multicore Texas Instruments KeyStone II architecture.


To serve the needs of different types of design teams that may be developing a wide range of applications, two ASSET Arium run-control probes support the SourcePoint ARM debugger:
  • The LC-500S is a cost-effective run-control probe for debugging ARM code for the KeyStone II architecture. SourcePoint on the LC-500S supports TI’s Embedded Trace Buffer and takes advantage of ARM’s Program Trace Macrocell (PTM) and System Trace Macrocell (STM) capabilities. The SourcePoint ARM debugger provides extensive post-capture analytics, results graphing and search functionality.
  • The LX-1000 Trace Port Analyzer supports extensive external storage of two gigabytes for trace results. Software and firmware engineers can thoroughly and effectively examine the trace results stored in the LX-1000 to identify the precise location of the cause of a bug in the code. Post-processing capabilities such as statistical tabulation and others are synchronized with SoucePoint’s line-by-line code display of trace results.

The Arium tools will also be available as part of the ScanWorks platform in its test and validation toolset.

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