Xilinx's Defense-Grade All Programmable FPGAs and SoCs boast 4th Gen secure capabilities

October 29, 2012

Toni_McConnel-October 29, 2012

Xilinx, Inc. announced its fourth generation secure architecture with Information Assurance and Anti-Tamper IP core support for defense-grade All Programmable 7 series FPGAs, including Virtex, Kintex and Artix FPGA families, and Zynq-7000 All Programmable SoCs at MILCOM 2012 (Booth #731), being held in Orlando, October 31- November 1, 2012. These high reliability, defense-grade devices are designed to reduce the risk and cost of deploying the latest Aerospace and Defense (A&D) systems. Manufactured with 28nm process technology, all devices are optimized for high performance and the lowest total power.

With the Vivado Design Suite, Vivado High-Level Synthesis (HLS) accelerates design implementation by enabling C, C++ and SystemC specifications to be directly targeted into Xilinx All Programmable FPGAs, SoCs and 3D ICs without the need to manually create RTL. Advanced algorithms used today in A&D applications, as well as a wide variety of other market applications, are more sophisticated than ever before. Vivado HLS provides system and design architects with a faster and more robust way of delivering quality designs.

Availability
The Xilinx All Programmable families of defense-grade FPGAs and SoCs are available in I-temperature (-40° to +100°C), Q-temperature (-40° to +125°C) and M-temperature (-55° to +125°C). The devices will be in production Q1 of 2013.

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