Microchip’s new PIC32MZ 32-bit MCUs triple performance of previous gen

November 19, 2013

Toni_McConnel-November 19, 2013

Microchip Technology Inc's new 24-member PIC32MZ Embedded Connectivity (EC) family of 32-bit MCUs provides performance of 330 DMIPS and 3.28 CoreMarks/MHz. The new family also features dual-panel, live-update Flash (up to 2 MB), large RAM (512 KB) and connectivity peripherals that include a 10/100 Ethernet MAC, Hi-Speed USB MAC/PHY (a first for PIC MCUs), and dual CAN ports. 

The PIC32MZ has code density that the company claims is 30% better than competitors, along with a 28 Msps ADC that offers one of the best throughput rates for 32-bit MCUs.  The family also features a full-featured hardware crypto engine with a random number generator for high-throughput data encryption/decryption and authentication (e.g., AES, 3DES, SHA, MD5 and HMAC), as well as the first SQI interface on a Microchip MCU and the PIC32’s highest number of serial channels.

The PIC32MZ family provides 3x the performance and 4x the memory over the previous-generation PIC32MX families, along with a high level of advanced peripheral integration.  For applications requiring embedded connectivity, the family includes Hi-Speed USB, Ethernet and CAN, along with a broad set of wired and wireless protocol stacks. 

Many embedded applications are adding better graphics displays, and the PIC32MZ can support up to a WQVGA display without any external graphics chips.  Streaming/digital audio applications can take advantage of this family’s 159 DSP instructions, large memory, peripherals such as I2S, and available software. The PIC32MZ’s 2 MB of internal Flash enables live updates via dual independent panels that provide a fail-safe way to conduct field updates while operating at full speed.

The PIC32MZ is Microchip’s first MCU to employ Imagination’s MIPS microAptiv core, which adds 159 new DSP instructions that enable the execution of DSP algorithms at up to 75% fewer cycles than the PIC32MX families.  This core also provides the microMIPS instruction-set architecture, which improves code density while operating at near full rate, instruction and data cache, and its 200 MHz/330 DMIPS offers 3x the performance of the PIC32MX.

More information http://www.microchip.com/get/ESJG or go to microchipDIRECT.

View a brief presentation:  http://www.microchip.com/get/1WEC

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