XMOS launches new tools and IP offering for xCORE MCUs
XMOS has announced the xTIMEcomposer Studio development environment and xSOFTip IP library. The new IP and design flow dramatically increase the market reach of XMOS’ xCORE multicore microcontrollers, allowing them to be used in a broad range of embedded applications that demand real time performance beyond the capabilities of traditional microcontrollers (MCUs).
The xCORE multicore microcontroller architecture provides the low latency, fast I/O response and deterministic performance required for demanding real-time applications. xTIMEcomposer and xSOFTip allow embedded designers to harness these capabilities entirely within a software-based design flow.
xTIMEcomposer Studio allows embedded designers to develop complex systems using xCORE multicore microcontroller devices in a familiar graphical design environment. The xTIMEcomposer suite includes static timing analysis and cycle-accurate simulation tools, making it easy to meet precise real-time requirements.
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As a complement to xTIMEcomposer, xSOFTip is a comprehensive library of more than 40 soft peripheral IP and processing blocks that can be used to configure xCORE multicore microcontrollers. A new, free-to-download GUI-based tool called xSOFTip Explorer allows developers to easily browse available xSOFTip blocks and quickly configure xCORE devices with the interfaces and peripherals they need.
The 32-bit xCORE multicore architecture allows processing performance to be dynamically shared, allowing a single chip to support multiple concurrent, real-time tasks that are completely deterministic. xTIMEcomposer and xSOFTip allow developers to build real-time embedded applications, working within a unified design flow that is familiar to any software engineer. The designer configures the xCORE device using xSOFTip IP blocks and create application code in C or C++, with real-time extensions, via the same flow, effectively creating a custom chip and associated application code that exactly meets the needs of the target system.