In his class at the Fall ESC in Boston on "Zero Wire Debugging Using Inductive Technology (ESC-320)," he will describe inductive coupling techniques that may eventually allow developers to say: "we don't need no stinking debug interface pins."

Using short range inductive technology, he says, early demonstrations at Renesas show that this approach (Figure 1 below) can be an effective way to achieve in-system on-chip debug for very-low pin count microcontrollers. "While this is still a research and development project, it holds great promise for the future of embedded system debugging," says Johnson.

Figure 1: A zero-wire debugging interface is created between two circuits via a common magnetic field using two inductive coils, one inside the package of the device to be debugged; the second in a flexible probe attached to the top surface of the package. (Source: Renesas)

Embedded system designers have been doing in-system debug since the early days of microprocessors. The tools have evolved from simple flashing LEDs to the point where on-chip debug is now the norm. However, as the trend toward low-pin count MCUs picks up, he says, it becomes more difficult to justify the overhead associated with dedicated debug pins.

As a result, numerous efforts have been made recently to come up with a variety of alternatives for low pin-count MCUs. Some vendors - such as ARM with its Serial Wire and TI with its Spy Bi-Wire - have reduced the five-pin JTAG connection to a single bi-directional channel and clock. Others " such as Renesas with its R8C/Tiny and Freescale with its Background Debug Mode " have developed their own non-JTAG single pin interfaces.

"Yet even single wire debug has some overhead," says Johnson. "Consider an 8-pin micro package. After excluding power and ground, only six application pins remain. Designating one pin for debug reduces I/O availability by 17%!

There also board layout limitations to deal with as well, since additional routing and connectors have to be included on a printed circuit board to access the debug port. "While small packages are a natural fit for miniaturized end applications, there may be no space left for a debug connector," says Johnson.

In the prototype design being developed at Renesas, inductive coupling links two ICs via a common magnetic field generated by inductive coils: one fabricated outside the device package and the second in a flexible probe that is attached to the top surface of the pages (See Figure 1 above)

The transmission scheme uses bi-phase, pulse-based modulation, which runs at a faster data rate than carrier-based modulation. A special probe IC conditions the signals to modulate and demodulate the data passed to and from the target MCU. It also removes noise from the received signals.

According to Johnson, initial studies indicate that the cost of adding an inductive interface to the target LSI is of the order of 0.1 cent per channel, since the pulse transceiver circuit is very small and the antenna can be formed in the top metal layer only.

The combination of the flexible circuit inductors and the probe IC is also cost-effective because the inductor pattern can be optimally customized for the target LSI while the probe IC can be designed for general use.

While work on the inductive debug interface is still in the research and development stage, Johnson admits there are a number of issues that must be overcome, such a probe alignment tolerances.

Despite that, he says that the goal of the next R&D phase is to add data transmission channels to provide a bus trace output, using a full bus trace (address, data and status signals) with three trace data channels and parallel-to-serial conversion. "By increasing the communication channel's clock frequency, a full bus trace for a 10MHz microcontroller can be achieved," he said.

To attend this and other informative classes sign up now on the ESC registration page.