Jim Weyand is a hardware designer and Jason Andrews is a software designer, but they have two things in common. First, both of them are conducting classes at the Fall Embedded Systems Conference in Boston, Ma., this month. Second, the topics they have chosen turn traditional hardware and software design methodologies upside down.

In "Coverage Driven Verification (CDV) for embedded software (ESC-463)," Andrews describes how some of the basic principles of hardware verification for automation, throughput and scalability can be applied to software verification. He uses a Linux device driver from a USB subsystem running a Linux kernel in a virtual machine hypervisor to show how device driver verification can be done using CDV.

In "A Methodology for successful VHDL"based FPGA design (ESC-462)," Weyand describes how to take methodologies commonly used in software design for structured code development, documentation and organization and apply them to VHDL-based FPGA design.

Synching up hardware and software verification
In his course on coverage driven verification for software, Andrews - an architect working in the areas of embedded software and hardware verification for SoC designs at Cadence Design Systems - focuses most of his attention on Linux device drivers, although such techniques can be useful in many software environments, such as GUI testing and library/API verification.

In Linux systems, he said, device drivers are normally tested by running them on the real hardware and observing the results. Some techniques exist to help with driver debugging but there are none that help much with dynamic verification. Most drivers are tested using some kind of system "stress test" that attempts to strain the system and the drivers to make sure they are stable under heavy load conditions.

"Although all of these and other tools and techniques are useful for testing drivers, there are no tools for verification planning, stimulus generation, functional coverage collection, and automated and coordinated stimulus for both the driver and the hardware it is controlling," said Andrews, and is an area where the basic principles used in hardware verification, as well as more advanced techniques for automation, throughput, and scalability, can be applied usefully.

. "In the past, many hardware verification users were primarily companies selling chips," he said. "Today, these same companies cannot compete in the market by providing a data sheet and device samples, but instead must develop chips, create evaluation platforms by putting chips on boards, and then provide all of the software to demonstrate a working system to prospective customers.

This has lead to increased investment in software by chip design companies and, as a result, over the last few years, Coverage Driven Verification has been working to fill this verification gap by enabling users to better utilize software as part of the hardware verification process in the familiar verification environments of Verilog, VHDL, and SystemC.

"In the future CDV will continue to focus on the chip customers who are developing software using many execution engines for simulation and emulation," he said. "There are also new opportunities for the application of Coverage Driven Verification technology in embedded software."