ASICs: ViASIC technology boasts 2-week turnaround from tapeout to ASIC production
Sandia Laboratories' ViASIC-based ViArray platform achieves rapid turnaround time for radiation-hardened designs.
The folks at
ViASIC, an electronic design automation (EDA) company that offers tools,
IP and services for reconfigurable semiconductor fabrics, today announced its technology has achieved a significant, proven advancement in
ASIC design – reducing the traditional eight-to-12-week turnaround time from "design freeze" to "silicon in hand" to two weeks.
Editor's Note: See also the associated "How To" design article titled: How to achieve design flexibility for free using Structured ASIC approaches.
Albuquerque, N.M.-based Sandia National Laboratories demonstrated this rapid turn-around for radiation-hardened (rad-hard) designs, using its ViArray trusted structured ASIC implementation platform based on ViASIC's patented standard metal configurable fabric and Sandia's radiation-hardened technology.
ViASIC's pre-defined and pre-characterized base platform lets manufacturing begin before design completion, and enables much earlier silicon availability. Using pre-qualified base arrays helps companies reduce non-recurring engineering (NRE) and development costs, and significantly improves time to market.
Applying ViASIC's patented fabric to rad-hard integrated circuits allows transistors to be characterized before via layer configuration begins. Staged characterized wafers can be stored at the fab, because characterization of the base layer transistors is totally independent of the design process.
Sandia is a multiprogram laboratory operated by Sandia Corporation, a Lockheed Martin company, for the U.S. Department of Energy's National Nuclear Security Administration. With main facilities in Albuquerque, N.M., and Livermore, Calif., Sandia has major R&D responsibilities in national security, energy and environmental technologies, and economic competitiveness. Sandia's ViArray trusted structured ASIC platform demonstrates electrical performance superior to that of FPGAs and approaching that of standard ASICs, and offers comparable computing and processing resources.
ViASIC and Sandia will participate in the 26th annual Hardened Electronics and Radiation Technology (HEART) Conference in Colorado Springs, Colorado, USA, Mar. 31 to Apr. 4, 2008. Please visit ViASIC (Booth 12), and Sandia (Booth 5) to learn more about reducing turnaround time for rad-hard applications.
