Maximum frequency of operation, useable bandwidth, noise performance and dynamic range must continually improve while power consumption remains flat or decreases. In short, the industry is demanding components with better performance-to-power ratios.

National Semiconductor's PowerWise products are developed using novel architectures on state of the art manufacturing processes resulting in industry leading performance at exceptionally low power consumption.

Using the reference design platform shown in Figure 1 below, this article demonstrates how a complete analog system can be developed using energy-efficient ADCs, fully differential amplifiers and clock conditioning circuits.

Figure 1: This reference design platform shows a complete analog system developed using ADCs, fully differential amplifiers and clock conditioning circuits.

Tailored to fit
A given process technology designed for ADC development will not necessarily be suitable for developing high frequency low noise amplifiers. In fact, normally companies use several different process technologies, CMOS, BiCMOS, SiGe etc. depending on the desired component parameters. Exceptional circuit design alone is inadequate without exceptional process technologies.

National's Advanced Process Technology Development group develops highly characterized and modeled, manufacturable and reliable, innovative and differentiated process technologies.

Special transistors are engineered in-house on several process technologies to achieve optimal analog performance at low power consumption. National uses pure CMOS technology for the design of many of it latest ADCs. CMOS is ubiquitous today because CMOS logic gates dissipate no static power yet have high drive current and speed.

Considering ADCs contain a high percentage of digital circuits, realizing the circuit design on pure CMOS technology results in lower power consumption compared to a chip designed, for example, on a BiCMOS process. Digital CMOS gates consume no current in DC mode.

Digital bipolar gates on the other hand consume current even in DC mode as bias currents are required to maintain performance parameters. The result is higher current consumption for the digital portion of the chip leading to higher total power consumption.

National has also specially developed processes such as VIP10 for amplifier IC design. VIP10 is a high-speed, dielectrically isolated, complementary bipolar IC process that utilizes deep trench technology on a bonded wafer for complete dielectric isolation and optimal high-speed amplifier performance.

Trench technology with bonded wafers helps minimize parasitic capacitance for optimal power-to-bandwidth performance, lower distortion and decreased die size. Complementary bipolar transistor designs, by using high-performance NPN and PNP transistors, can offer the best combinations of features required in today's high speed amplifiers: high bandwidth, low power consumption, low supply voltages, large output swing, high output current and low distortion.

The most common AC figure of merit for a bipolar transistor is the transition frequency (FT) which is the frequency at which the common emitter current gain decreases to unity. The FT of the VIP10 NPN and PNP at Vce=5V are 9GHz and 8GHz respectively, about 50 percent higher than on competitive processes.

The transistor FT being high means that its emitter-base diffusion capacitance will be low for a given operating point. With VIP10 transistors, National can design amplifiers either with bandwidths exceeding 1GHz or with bandwidths in the 100MHz range with very low power consumption.

This is because the internal stages will have low phase shifts even at very low operating currents, since both diffusion and parasitic capacitances have been greatly reduced. FT can dramatically decrease at lower voltages on some bipolar process. But FT's on VIP10 remain high at Vce=1V: 7GHz for the NPN and 5GHz for the PNP. Equation 1 below shows how the transition frequency of a bipolar transistor can be calculated.

Here k is Boltzmann's constant, T is absolute temperature, C_te is the emitter capacitance, q is the unit charge of an electron, I_C is the collector current, WB is the base width, uB is the electron mobility, rcs is the collector resistance, C_cb is the collector capacitance, X_sis the width of collector space charge region, and vx is the saturation speed of the collector space charge region.