Mountain View, Ca. - MIPS Technologies, Inc. today announced what it claims is the  industry''s first 40nm USB PHY IP core and first USB-certified 1.8v 45nm USB PHY IP core.

A leading cellular communications chipset provider will be first to go into production with an SoC that integrates MIPS Technologies' silicon-proven 1.8v 45nm PHY. The cores are designed to allow developers to quickly integrate USB functionality intoadvanced SoCs for a wide number of vast number of consumer applications. "

According to Celio Albuquerque, director of physical connectivity solutions, Analog Business Group, MIPS Technologies, the new USB PHY IP cores represent a new generation of USB physical layer architectures using 1.8v or alternatively 2.5v IO devices to deliver what he claims is the industry's lowest power consumption for 45nm and 40nm SoC designs.

"Low power, along with a compact, silicon-saving design, makes these IP cores especially well-suited for leading-edge mobile applications," he said. "Advanced programmability allows developers to fine-tune the analog parameters of their system for maximum performance results in silicon."

To learn more, go to www.mips.com..